This is great, I was hoping for comments like this.
I'd suggest some factor less than .5, flux shift
errors on floppies
rarely move a great amount unless the spindle bearings are rattling
loose.
For the particular 8" floppies I was trying to read, a few seemed to need
a factor of 0.6 or even 0.75 to be read. Many worked fine with 0.0.
Actually based on media and expected recording rate
it's
possible to plug in a set of expected timing windows and add/subtract
a "precompenstation" window amount based on adjacent bits. For
example adjacent ones or zeros (especially more than two bits)
tend to spread or compress over patterns like alternating ones
and zeros.
Further with all the "timing image" in a memory it should be possible
to look at longer strings of transistions and do simple predictive
forcasting (software PLL). Add to that the encoding form (FM,
MFM, M2FM, RLL or GCR), and previous bits history it should be
straightforward enough to predict the likely next transistion(s)
be they one or zero.
This sounds like just the thing to do. Do you have any references where
I could read up on this kind of algorithm? I've never studied signal
processing -- I have a mathematics and computer science background, not
engineering -- so I've been working by intuition up to this point.
(Hmm, looking at Tim Shoppa's later response gives me the keywords "partial
response maximum likelihood" to look for. That should help.)
Another neat trick might be to notice when there is a CRC error and/or
a clock violation, and in that case backtrack to a recent past decision
where the second most likely alternative was close to the most likely,
try it the other way, and see if the result looks better. Obviously one
can't overdo that or you'll just generate random data with a CRC that
matches by chance, but since the CRC is 16 bits, I'd think it should be
OK to try a few different likely guesses to get it to match.
Tim Mann tim.mann(a)compaq.com
http://www.tim-mann.org
Compaq Computer Corporation, Systems Research Center, Palo Alto, CA