- test-drb@ccmp.vtda.org - classiccmp.org

by danburrows＠mindspring.com

>Tim, > >I should have qualified that as common residential and business circuits. >Sure it's possible to go to 60A, how many houses nomially have that? >(don't include mine). > >Allison > I have a few 50A 120 and 240v. Then to I have a 400A house service that I subfed 200A to my office / shop and then to the shed where the welder is. I even put a 100A panel on the wall behind the row of 7 6 foot racks for the test beds. It was cheaper and easier than putting all those Hubbell's on the wall. Dan

27 years, 1 month

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Power connectors

by danburrows＠mindspring.com

To help reduce the US power confusion I just hand scratched a US single phase power configuration from the pole transformer into the first breaker panel. All panels after the first one are not allowed to have the Neutral and Ground tied together. (Sub feed panels) Please ignore the horrible hand drawing I just want people to be safe. ftp://zane.brouhaha.com/pub/dan/power.gif Dan

27 years, 1 month

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New additions: Hero1

by SUPRDAVE＠aol.com

OK, so it's not the holy grail (apple lisa) , but it's close. Picked up a complete Hero1 with speech synth and arm in his own custom carrying box. it came complete with charger, cables, all schematics and manuals and some dos based compiler programs to write apps that can be downloaded to the robot via serial link. Also got a data book on all motorola chips and some robotics study courses as well as lots of handwritten notes by the original owner. Unfortunately, he doesnt work right. I think his motor drive may have to be rebuilt and although he did say "okay" once, his digital display is scrambled and he wont initialise. Gel cell batteries will have to be replaced since he's been sitting for at least 5 years. Will be a fun project and will get plenty of space on the upcoming computer museum website.

27 years, 1 month

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

I'm no expert on Roman numerals, but I recently saw a movie released in MCMXLIX. Now, we know what the MCM means, but I submit that the intention of chiseling as little stone as possible, the romans avoided the use of 4 successive numerals by use of bi-quinary counting. However, the use of IX for 9 as opposed to VIV, as in the MCM above, is a bit ambigous. I'm not planning any trips to the former Roman Empire, so I doubt I'll do better than trusting the conclusion reached in this forum. Does anybody have an authoritative reference? Dick -----Original Message----- From: Hans Franke <Hans.Franke(a)mch20.sbs.de> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Tuesday, April 20, 1999 3:10 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) > >> > > Convert a binary value to Roman, using ASCII characters (or >> > > the native character set if applicable) into a string >> > > with a termination character (if ASCII, use the NUL (0) >> > > character). >> > Is a length terminated record valid ? > >> Hmmmm ... I might be inclinded to say yes, but is there any reason it >> can't be NUL terminated (or terminated with the appropriate termination >> character for the character set)? > >Just since it is the usual way within the OS I'm trying to code. >NUL is like any other caracter valid within a string. Also, it >gieve me an disadvantage - instead of just adding '\0' I have >to calculate the string. > >> > > The valid Roman characters used are IVXLCDM >> > Is Space valid ? Romans did include them at will. >> I did not know that, but for this program no, spaces are not allowed. > >Ok. > >> > > > There are a few details which have been left out of the specification for >> > > > this task. >> > > > Does it require input validation? >> > > I think I specified that. The valid range of Roman numerals is 1 through >> > > 3,999 inclusive. The routine does have to check that and construct a >> > > special string ( "*" ) if the input is not in that range. >> > > > Is the binary input pure binary, or is it BCD? >> > > Okay, that might be a valid point, but it's pure binary, not BCD. > >> > Fine, you stated max input 3999, but to be checked, and you >> > stated binary, but in what format ? Half Word (16 Bit), >> > Word (32) or Double Word (64) ? > >> Uh, I was unaware that halfwords had a specific size (on the DEC Alpha, a >> half word would be 32 bits in size). > >Like Words, they are just machine dependant ... in a given 32 Bit CPU >a halfword is just 16 - so whats the input ? (in fact, I'll assume 32 Bit) > >> > To be transfered at a given location, or via a pointer, >> > or via register (attention, might again be processor specific). > >> Appropriate to the CPU or the situation. Obviously, a 6502 can't pass it >> in a single register, but there are other options. That's why I didn't >> specify how to pass the data in. > >:))) And why specifying a '\0' byte ? > >> > > I liked Sam's suggestion of ``printing to memory'' as a way to avoid the >> > > complications of I/O in this, and if I didn't make this clear that the >> > > conversion was to be stored in memory, I'm sorry. >> >> > Output, to a given location (pointer) or static buffer ? >> > Check for buffer length or asumption of an buffer, always big >> > enough ? (if you check the binary number you also have to check >> > the buffer (if given).) > >> Again, it's up to the programmer. But be prepared to justify your answers >> 8-) > >:)) > >> -spc (Welcome to the world of programming 8-) > >All simple, all the same, isn't it ? > >And again, more questions: >If I'm right at Megans description, she just include the next lower >digit when it comes to these subtraction rules, and your Algo seams >to be weak at the same point. Let me give an example: > >49 would be normaly coded as IL (always remember, it was kind of a >system to reduce writing as much as possible - there are even examples >where the number 248 is written CIIL) while Megan seams to code it as >XXXXIX - basicly wrong - or did I miss something ? I'm not realy >what one can call a DEC-Geek. > >So do we only have to supporte the one-less rule, or the rule >of one subtraction numeral - or the full possibility with the >goal to reduce writing to a max ? > >Gruss >H. > >Oh, BTW: this contest is exacty into the direction where we didn't >want to go - we are comparing algorythms and not CPUs - for a more >CPU dependant contest we need to fix the algo to use, so the difference >will reflect the differences in processor design and not into algo >design (of course there's more sex appeal in the my-algo-is-bether- >than-yours, than in the my-(what-ever-algo)-implementation-is-better). > >So I still go for the idea of implementing one algo as good as possible >for the different CPUs - more on Friday (I'm not full time available >until then). > > > >-- >Stimm gegen SPAM: http://www.politik-digital.de/spam/de/ >Vote against SPAM: http://www.politik-digital.de/spam/en/ >Votez contre le SPAM: http://www.politik-digital.de/spam/fr/ >Ich denke, also bin ich, also gut >HRK

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by allisonp＠world.std.com

<Perhaps soft iron #2 washers would be a better choice. The local hardware Same material as the nuts. A higer carbon steel (more remnant magnetizem) may work but you really want small to keep the drive resonable. Allison

27 years, 1 month

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heads up; OSI Challenger 1P

by steverob＠hotoffice.com

> > Realy 234V (strange) and 180 degree ? Where do you know ? By definition ? > Just remember, if you tap between 2 phases of a 3~ signal you still get > a perfect sinus and you can't decide if it is a single phase or part of > a 3 phase signal. Ok, I'm always learning new things on this earth :9 > The numbers just saemed to fit well. > It's 230, 231, whatever it takes (from the movie "Mister Mom"). I'm sure the power company has a legal obligation to keep the voltage within a certain range of values. Although, I don't know exactly what that range is. I think 117 is probably the optimal value for each of the legs giving 234 for the total. I've heard it referred to as 110, 115, 117, and 120. Since the actual voltage varies any of these could be correct. Since it is a simple transformer, the phases are 180 degrees out of phase (by definition). That's assuming a balanced resistive load. Of course, that could change under a heavy inductive or capacitive load but, that's an extreme and won't normally present a problem. Steve Robertson - <steverob(a)hotoffice.com>

27 years, 1 month

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

There are a few details which have been left out of the specification for this task. Does it require input validation? Is the binary input pure binary, or is it BCD? Shouldn't it go both ways, i.e. shouldn't we also have to convert ROMAN to BINARY as well as BINARY to ROMAN? What about the console I/O routine? Shouldn't there be some definition of how it's to be used? Should it be a call with the I/O character simply held in a register before/after the call? How much memory is used can be defined in two ways. (a) the number of bytes, and (b) how much contiguous memory must be present in order to allow the code to be implemented. It requires 200 bytes of RAM is not a valid statement if that RAM has to be scattered over a 32-KByte range. If your claim is that your code runs in 200 bytes of memory, it must be runnable on a computer having only 200 bytes of memory. If you can't figure out how to build a 200-byte RAM, then perhaps it might be more appropriate to suggest it requires only 256 bytes of RAM, which you can buy. Was the processor in question available in 1983? As I recall, the 6809 was, but there are some which weren't. Now, for the more subjective aspects of the comparison, how was the code initially generated? How long did it take to code the problem? How long to debug it? How is the 6809E relevant to the timing of the Z-80 and 6502? These issues should be resolved, I think, before everyone takes off. Dick -----Original Message----- From: Sean 'Captain Napalm' Conner <spc(a)armigeron.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 1:28 AM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) > > My entry uses the MC6809E as used in the Color Computer Line from Tandy. >My general approach to this (as well as programming in general) is to avoid >the use of logic statements (comparisons/branches) and trying to use all the >registers to their best possible use. > > Static memory usage: 163 bytes > Dynamic memory: 16 bytes > Stack memory: 12 bytes > > Minimum Cycles: 21 > Maximum Cycles: 687 > One digit:* 144 > > *Due to implementation, this can be 1, 10, 100 or 1,000. > > Code ROMable: Yes > Data ROMable: Yes > Code is Re-entrant: Yes > Data is Re-entrant:* Yes > Undefined Opcodes: No > Undefined Behavior: No > > *Does a separate copy of static memory need to be created > for each re-entrant copy? If this answer is `no', then > the data is re-entrant. > > The main process is set up to avoid complicated logic, which leads to both >speed loss and size bloat. To this end, I have a jump table for each digit >to print (PTAB). The digits to be printed are stored in TABLE in decending >order, since that's the way I calculate the number (from largest to >smallest). I classifed the Roman numbers into two classes, ones and fives. >The `ones' class contains I, X, C and M. The `fives' class contains V, L >and D. There is another class, called `tens' which is a subclass from >`ones' (X, C and M). TABLE is set up such that for any grouping, [the >register] X points to the `ones' character, the previous character is the >`fives' character, and the one previous to that is the `tens' character. >The routines pointed to by PTAB should be relatively straight forward from >there. > > The only other tricky part comes to actually calculating the values to >print. ROMSUB repeatedly subtracts a value from the value we passed in, >keeping track of the number of times we do a subtract. This value to >subtract is stored inline of the code and is pulled off from the stack. The >actual return is stored on the stack, and is done by `JMP [1,S]' (where the >top of the stack contains the count). > > The calls to ROMSUB occur from RM1000, RM100, RM10 and RM1, and to get >there, we first store the address of RM1000 onto the stack, and in the main >loop, the first line of code `JSR [,S] calls RM1000. This returns with the >count on the top of the stack (and the address to RM1000 is still there) >where we then convert it to a Roman digit. Then we update the address to >RM1000 by 4, which then points it to RM100. We keep doing this, calling >RM10 and RM1. The last adjustment lands us in RMEXIT, which cleans up the >stack and returns to the calling program. > >************************************************** >* ROMAN CONVERT BINARY VALUE TO ROMAN NUMERALS >* >*ENTRY D VALUE TO CONVERT >* Y DESTINATION OF AT MOST 16 BYTES >*EXIT D DESTROYED >* Y PRESERVED >* ALL OTHERS SAVED EXCEPT CC >*************************************************** > >ROMAN CMPD #3999 CHECK RANGES > BGT ROMERR > CMPD #0 > BLE ROMERR > PSHS X,Y,U > LDX #RM1000 > PSHS X > LDX #TABLE > >ROM10 JSR [,S] > PSHS D > LDB 2,S > BEQ ROM20 > ADDB 2,S > SUBB #2 TIME SHORTER THAN DECB/DECB > DECB INDEX INTO JUMP TABLE > LDU #PTAB > JSR [B,U] >ROM20 PULS D > LEAS 3,S REMOVE COUNT AND RETURN ADDRESS > LDU ,S ADJUST FOR NEXT ROUTINE > LEAU 4,U > STU ,S > LEAX 2,X INCREMENT TO NEXT CHARACTER > BRA ROM10 CONTINUE > >ROMERR LDD #$2A00 > STD ,Y MARK ERROR AND END OF STRING > RTS > >RM1000 BSR ROMSUB > FDB 1000 >RM100 BSR ROMSUB > FDB 100 >RM10 BSR ROMSUB > FDB 10 >RM1 BSR ROMSUB > FDB 1 >RMEXIT LEAS 4,S > CLR ,Y > PULS X,Y,U,PC > >ROMSUB PULS U > CLR ,-S > >RS10 CMPD ,U > BLO RS20 > SUBD ,U > INC ,S > BRA RS10 >RS20 JMP [1,S] RETURN TO CALLER OF CALLER TO ROMSUB > >TABLE FCC 'MDCLXVI' > >PTAB FDB P1 > FDB P2 > FDB P3 > FDB P4 > FDB P5 > FDB P6 > FDB P7 > FDB P8 > FDB P9 > >*********************************************** >* FOLLOWING ROUTINES HAVE THE FOLLOWING >* ENTRY B OFFSET INTO JUMP TABLE >* U JUMP TABLE >* X TABLE >* Y STRING TO STORE INTO >* EXIT A DESTORYED >* B DESTROYED >********************************************** > >P3 LDA ,X LOAD FROM 1 TABLE > STA ,Y+ STORE CHARACTER >P2 LDA ,X > STA ,Y+ >P1 LDA ,X > STA ,Y+ > RTS > >P4 LDA ,X > STA ,Y+ >P5 LDA -1,X LOAD FROM 5 TABLE > STA ,Y+ > RTS > >P6 >P7 >P8 LDA -1,X > STA ,Y+ > SUBB #10 > JMP [B,U] > >P9 LDA ,X > STA ,Y+ > LDA -2,X LOAD FROM 10 TABLE > STA ,Y+ > RTS > >*********************************************** > > -spc (Eat and Enjoy ... ) >

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by allisonp＠world.std.com

<I've never tried it, but I remember reading in some DIY computer book <from the 1960s that those anti-parasitic beads didn't work as core memory <cores. I suppose you could try them, though - maybe more complex <electronics would help.. You need something you can saturate hard. Tape wound materials were used a lot early on. It's not too hard to test an assortment of things as you only need one. Allison

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by Philip.Belben＠pgen.com

>> Can you translate that to a size? I can imagine the size of a #4 nut >> (I have several). I can't clearly picture how big the O.D. of a #2 would be. >> > Roughly .1375 across the hex faces. > >> > ...A good material for this is hypersil commonly used for transformers. >> >> Used for the windings or the core laminations? > > Hypersil is a silicon steel alloy and is used for laminations. Copper, is > the wire. I seem to have lost the attributions of much of the above, but... I would have thought that transformer steel is _not_ a good material for cores. Transformer steel is designed for making the hysteresis as small as possible, so as to minimise core losses, etc. Whereas for core memory, you need a good sized hysteresis because this corresponds to stored energy, which will drive the pulse on the sense line. (As I understand it, when you _don't_ flip a bit, the pulse on the sense line is roughly that from the transformer effect in the core. If you _do_ flip a bit, you get the transformer effect, plus a pulse of stored energy from the core.) Rather than using steel nuts - which may be very inconsistent in their magnetic properties - would ferrite beads, as used for interference suppression, work? Or to they have too small a hysteresis like transformer steel? > That is only part of the picture. Core size affects switching speed and > current needed to switch. Compounding this is more wire means > resistance, heat and inductance all influencing how fast you can switch. > Core is where magnetics, analog and digital intersect. Nice Description, Allison. I like it. Philip.

27 years, 1 month

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heads up; OSI Challenger 1P

by allisonp＠world.std.com

<>that were clearly under 1.4kw. The codes are aimed at providing reasonabl <>power. Here a 15A/115v is the nominal and 115V/20A is a max < <No, it isn't. I have several 115V 30A circuits in my computer room - <this being an extremely common rating on the power controllers used <in smaller DEC systems - and looking at the codes and the Hubbell catalog <it would seem that 60A circuits are standard things as well. Tim, I should have qualified that as common residential and business circuits. Sure it's possible to go to 60A, how many houses nomially have that? (don't include mine). Allison

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Tony Duell <ard(a)p850ug1.demon.co.uk> wrote: > > > The wire used should present little trouble as fine wire can still be > had. > > > > Any idea how to estimate the gauge? I know I'd need red and green > enameled, > > Do you have/can you borrow a micrometer? As a matter of fact I do. I should have thought of that before. > There is a prototyping system, made by a company called 'road runner' > that uses fine enammeled wire. I think it's 30swg or something like that. Is this like Augat Unilayer? > > How much oomph would it take to induce a stable magnetic pattern in a > > steel nut?!? > > > > Anyone with a EE degree and a copy of Spice care to take a stab at it? > > Or alternatively do it properly and _build_ the darn thing :-). I do not believe my engineering and math skills are adequate to design it, but given the specs, I sure could _build_ it. If anyone is considering this, please bore out the threads of the nut (if you use nuts) before determining the saturation current. It will minimize mechanical wear on the insulation. I may just go to the local fastener house and buy a box of #2 nuts and build a mat of this just to hang on the wall. ;-) -ethan -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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Ongoing core memory discussion (was Re: How scarce (valuable) is core for the PDP-8?)

by ethan_dicks＠yahoo.com

--- allisonp(a)world.std.com wrote: > Correct, but the pulse that indicates the core switched is delayed in > time Hence the critical slice time. Ah! The light goes on! > Core size affects this as does the select current. That makes perfect sense. > Actually the nuts have an adaquate hysteresis to make a demo core but it > would not work useably well. Funny you should mention demo core. I have had in the back of my mind for several years now a project: demonstrate memory storage by building a mini- core mat on top of an FPGA socket and drive it via some kind of parallel- port A-D/D-A interface. The purpose of the demo would be to stick the core mat into a ZIF socket, program it, display the bits on the screen, remove the mat from the socket, turn it around and show how the bits have moved... not particularly practical, but a good visual demonstration of the technology. A special bonus is that the demonstrator can prove that core is non-volatile by letting the audience see the plane out of the socket between phases of the demonstration. I'm thinking of a 4x4 or a 5x5 mat; nothing larger than 8x8. The test jig could be even 2x2 inside a larger FPGA socket. The external circuit would have to be able to select the half-currents on the X and Y planes, then send a pulse and then time the return, yes? I have a general knowledge of the sense amps and inhibit drivers for several PDP-8 models. Is it possible to simplify that circuit if you knew that you had read cycle time of several or tens of milliseconds? Perhaps by having one circuit to control all the X lines, one circuit to control all the Y lines and some sort of analog multiplexer? > Ferrites used for beads have low permability. But since they are available > I'd try one and see. How do the different dimensions affect this all? (Most ferrite beads I've seen are taller than their diameter (HoHo's, not KingDons, if you will). In other words, the ferrite beads have a different aspect ratio compared to the #2 nuts (or a standard ferrite core). How does this affect usability as a memory device? -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

Well, I recall that someone said, a while back, that the devil's in the details. What I'm trying to do is place boundaries around this problem for purposes of understanding its limits. Others who attempt to replicate your work on other processors will want to know these things. From your statement that the process produces a result of '*' for an invalid input, which, apparently would include negative values, non-integers, and integers of value 4000 or greater. If the input is presumed to be unsigned integer, that solves much of the problem. Now, you want to store the output in memory, presumably as ascii characters, presumably as a null-terminated string, and perhaps (optionally) echo it to the screen in the aftermath of your run. Does that sound like a reasonable thing to do? How do we tell this program what string of numbers to convert? Is this someting you want to put into memory as a null-terminated string of binary values, or would you prefer a single word for each value, with a null terminating the input array or a fixed string length? It's still simple enough. I can even understand it myself, I think. Dick -----Original Message----- From: Sean 'Captain Napalm' Conner <spc(a)armigeron.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 12:23 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) >It was thus said that the Great Richard Erlacher once stated: >> >> There are a few details which have been left out of the specification for >> this task. >> >> Does it require input validation? > > I think I specified that. The valid range of Roman numerals is 1 through >3,999 inclusive. The routine does have to check that and construct a >special string ( "*" ) if the input is not in that range. > >> Is the binary input pure binary, or is it BCD? > > Okay, that might be a valid point, but it's pure binary, not BCD. > >> Shouldn't it go both ways, i.e. shouldn't we also have to convert ROMAN to >> BINARY as well as BINARY to ROMAN? > > One thing at a time, please 8-) > >> What about the console I/O routine? Shouldn't there be some definition of >> how it's to be used? Should it be a call with the I/O character simply held >> in a register before/after the call? > > I liked Sam's suggestion of ``printing to memory'' as a way to avoid the >complications of I/O in this, and if I didn't make this clear that the >conversion was to be stored in memory, I'm sorry. That should work. In fact, input could be done that was as well, placing the input in memory and then executing the program from a debugger or with a call from a HLL. >> How much memory is used can be defined in two ways. (a) the number of >> bytes, and (b) how much contiguous memory must be present in order to allow >> the code to be implemented. It requires 200 bytes of RAM is not a valid >> statement if that RAM has to be scattered over a 32-KByte range. > > Uh ... okay ... gee ... I thought common sense would be enough here. > > The problem here is that I could say: Code segment size, data segment >size, bss (dynamic) segment size and stack segment size, but that tends to >lead to certain assumptions about how to code (at least to me). In modern >systems, code and data are kept separate, but there's nothing really >requiring that, and as you can see from my solution, I mix both code and >data together, which was a common trick in the 8-bit era (and maybe used >earlier as well). This is an issue only because these systems have both ROM and RAM, and using parts of each can bias the resource tally without really having any meaning. >> If your >> claim is that your code runs in 200 bytes of memory, it must be runnable on >> a computer having only 200 bytes of memory. If you can't figure out how to >> build a 200-byte RAM, then perhaps it might be more appropriate to suggest >> it requires only 256 bytes of RAM, which you can buy. > > I'm a software guy---building computers isn't exactly my forte. Besides, >if I say my code only requires 200 bytes of memory, and I can't figure out >how to build a computer with 200 bytes of memory (pretty easy for me 8-) >then that means I have 56 additional bytes to play with, maybe by adding >code to run blinkenlights or something. > > Besides, who wants to build a computer for this? Okay, except for Tony? That's the ultimate test, though, isn't it? >> Was the processor in question available in 1983? As I recall, the 6809 was, >> but there are some which weren't. >> >> Now, for the more subjective aspects of the comparison, how was the code >> initially generated? How long did it take to code the problem? How long >> to debug it? > > This I'd rather not include as this is very subjective. It only took me >about an hour or so to code and debug the program, but I'm a software guy >that's been programming for 15 years or so, and the 6809 was my first CPU I >learned assembly language on. It might take Tony four hours to get a >similar program running. By the same token, he could probably get a simple >computer system running in an hour that would take me four hours. > > It really depends upon how much experience you have both in programming >and the CPU in question. I know that it would take me longer to write this >program for the 6502 or the Z80, both of which I've never written code for >(but I can read code for each CPU). > >> How is the 6809E relevant to the timing of the Z-80 and 6502? > > Nothing at all, except as an outside reference. That, and I don't really >know Z80 or 6502 code (nor do I have development systems for these chips). > Its certainly an outside reference. It may be a challenge for everyone to improve on it. . . We'll see, I guess > -spc (Gee, I thought it was pretty simple problem myself ... ) > >

27 years, 1 month

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Is this a silly question - re: microcode

by jlwest＠tseinc.com

As many of you all know, I'm trying to get an HP2000 TSB system up and running. Purist that I am, I am using only original HP gear for it. However, I'm also thinking ahead to the power consumption (ie the Amps) that the system draws. I might not be able to afford to keep it online all the time. So I have been starting the mental exercise of laying out how to best design an emulator. The overal design layout is complete, but there is a low-level issue I can't get my brain around and thought someone here might have some input on the following: The 2100A/S or 21MX/E systems were microcoded. Matter of fact, the control processor on those systems is 24 bit, while the appearance at the non-microcode level is a 16 bit machine. Should I write my emulator to process the microcode instructions or the 2100A/S or 21MX/E instruction set that the microcode implements? I was planning on the latter, however one argument for the former is that HP did release special ROMS to extend the instruction set for special applications (DMS for one, SIS, FFP, 2000Access IOP for others). I would like users to be able to set the emulator to a given hardware configuration (ie. command line options to turn on the DMS, SIS instruction sets) rather than assuming a machine configured with all available options. Each I/O interface card would have it's own loadable module, so they can select what cards are installed in what slots, etc. I just have the gut feeling that there's some obvious reason to do one or the other that I'm missing... Yes, I am aware of Jeff Moffat's 2100 emulator; nothing at all against his code, but I'd just prefer to start from scratch (this means I'm idiotic or masochistic or more than likely both) <Grin>. I'll write it in C on Unix (FreeBSD) but make sure the makefiles are setup so DOS porting is just a configure argument. Heck, the whole project is worth it just to see TSB running on a Pentium II 400! Any input appreciated! Jay West

27 years, 1 month

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*.cam files

by roblwill＠usaor.net

Hi! I was just given some *.cam files. They're supposed to be image files of a computer to put on my webpage (classic computer section). They were taken with a digital camera, and downloaded to a PC. My question is: how in the heck do I view them?? Anyone have any idea? -- -Jason Willgruber (roblwill(a)usaor.net) ICQ#: 1730318 <http://members.tripod.com/general_1>

27 years, 1 month

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heads up; OSI Challenger 1P

by danburrows＠mindspring.com

>Please ? Equipment that assumes Neutral (protective ground) = Ground ? >At least over here this kind of device is _strictly_ forbiddeen since >>30 years, and I assume it's the same all over Europe. Only machinery >with distinctive Ground and Neutral or with isolated interior is allowed >(the wide variety of outlet/plug systems within Europe did support the >later one a lot, since most are at least compatible for 'hot' and Ground >pins :). In all of the UK equipment that I service from one particular manufacturer they only switch and fuse the one hot lead. The Neutral is "assumed to be at / near ground so it need no protection. If this is wired to a standard US residential then you will have no fuse protection on one lead. It will also be floating when switched off waiting to bite you. See the following attempt at ASCII art wiring which looks wrong if not viewed fixed width. US residendial 240 /120 mains power _______240V_________ | | Hot____ Neutral_____Hot | | | |__120V___|__120V___| | | | Ground This is tied to Neutral at service entrance ONLY. >standard voltage (with an upper limit of 120) which comes to 200V (208V), >and not 220 - and 200 is definitive to low to drive 230V (240V) equippment. >Not even the old standard 220V Eq will run properly in all cases. This is where the US confuses people. In commercial 3 phase it is 120 phase to neutral. 208 phase to phase. Again with neutral tied to ground at the service entrance ONLY.

27 years, 1 month

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heads up; OSI Challenger 1P

by jlwest＠tseinc.com

Looks like it takes 240v. Can it be changes to 120v I wonder? I'm not really into micro's, but I do remember the Ohio Scientific stuff vaguely.... Jay -----Original Message----- From: Andrew Davie <adavie(a)mad.scientist.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 10:19 AM Subject: FA: heads up; OSI Challenger 1P >This is sort of a heads-up. Even though I am the actual "seller", I'm >really putting this item up for a close friend. I'd buy it myself if I >could, but I'm in an anti-aquisition mode myself. It's an OSI Challenger 1P >computer + documentation >http://cgi.ebay.com/aw-cgi/eBayISAPI.dll?ViewItem&item=93182204 >There are some nice piccies even if you're not interested in bidding. >HI to all :) >A > > >

27 years, 1 month

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Several things

by yakowenk＠cs.unc.edu

In-Reply-To: <m10YZmF-000IyOC@p850ug1> from "Tony Duell" You are right, not only _could_ I argue that the FPGA version is not microcoded; I strongly assert that it is not. (Unless you meant to have the FPGA be functionally equivalent to the ROM. But I *think* you meant it to subsume other parts of the processor to try to muddy the water. Because if the FPGA is just a ROM substitute, then it is an obvious control store for the microcode.) No microcode --> not microcoded. It's just a question of implementation really, not a fundamental design characteristic. Now, if you make writable microcode, you've exposed the innards to the programmer, and it becomes a part of the functional description of the thing. But if you don't do that, the programmer can't tell the difference; a microcoded and non-microcoded machine could behave identically. I'm sure we could carry this to the point that there is a grey area, but I don't think we're there yet. It's the philosophical problem of the beard, right? You trim a little off, and it is still a beard. But if you keep doing that, eventually you get to a point where you are quite sure there is no beard. Somewhere in between, was there one atom that you cut off that made it from a beard into a non-beard? What if you didn't really cut that atom off, but just stretched its molecular bonds to the limit...? Of course, it seems to me that so far you've been considering a case of five o'clock shadow, and wondering it if might be a beard. :-) I guess, if it has some kind of counter selecting bit-patterns that control the flow of data in the CPU, I could call it microcoded. If there is no cohesive place from which such bit patterns are retrieved, then it is not. (Now, I'm sure you'll make me eat those words. :-) ) It just struck me that the microcode in a CPU is very much like the rules of an expert system. The whole point in an expert system is to isolate the knowledge from the program, so you can tinker with the former and not get involved in the later. Microcoding lets you abstract away the complications of the control logic, reducing it to "these bits at that time-step" thinking, without getting bogged down in gate propagation delays or chip counts. Lets us programmers get a little closer to the hardware, without the obvious dangers of letting us too near the soldering irons. :-O Ah. There's the grey area. Take all the logic around your state FF's and registers. Call it a microcode ROM. Of course, the fact that it is spattered all over your CPU board weakens the argument that it is a unit in any way, but then maybe you could rearrange the board to put all that gorp on the left side... So now I have a fuzzy definition: a CPU is microcoded to the degree to which the control logic is encapsulated in the form of a control store. Most real world cases are probably close to 100% or 0%, but I have no doubt we could construct any degree of set membership that we like. I might be willing to stop prattling on about this now. Maybe. :-) Bill. On 17 Apr 1999, the Insanely Great ard(a)p850ug1.demon.co.uk (Tony Duell) wrote: ] > Do you mean to say that _all_ computers are microcoded? After all, ] > the control logic can always be modelled by some number of state FFs ] > and a large-enough ROM, couldn't it? Or is your claim that there is ] > no such thing as microcoding? That strikes me as far-fetched as well. ] ] This is the problem. Obviously both of those statements are false based ] on our usual use of the term 'microcoding'. But it's hard to see just ] where to draw the dividing line. ] ] > The difference is that a ROM is easily replaceable; slap in another ROM ] > or EPROM with different microcode burned in, and you've got an entirely ] ] OK, here's a counterexample. ] ] Consider the PERQ. It's microcoded. It's obviously microcoded - there's a ] 16K*48bit _RAM_ that stores the microcode. And there are supplied tools ] to rewrite that microcode. ] ] Now suppose I get a large enough FPGA (I don't think any of the ones ] currently available are large enough, but). I stick it on a board. And I ] provide a tool that does the following : ] ] It takes PERQ microprogram, and combines it with a description of the ] rest of the CPU logic. It then optimises the result, and programs the ] FPGA accordingly. ] ] The result is a processor that runs exactly the same programs as a PERQ ] with that microcode. But you could reasonably argue that the FPGA version ] is not microcoded - you would look in vain for anything resembling a ] control store in the FPGA. ] ] Perhaps the term 'microcoded' should be applied to the original design ] philosophy - if the control logic was _designed_ as a program, then it's ] microcoded.

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Allison J Parent <allisonp(a)world.std.com> wrote: > <sort of a "one from column A, two from column B" approach. > > Not likely but ther eis anotehr totally different problem, asymetric noise > pickup masking the cores switching. I hadn't thought of that. Good point. Another problem is that "worst case" diagnostics won't necessarily be worst case anymore. > You're further ahead fixing the mat. Sigh. It looks like *quite* the challenge. > The wire used should present little trouble as fine wire can still be had. Any idea how to estimate the gauge? I know I'd need red and green enameled, perhaps another color like yellow? I also wonder what they used to insulate the splices? It appears to be some kind of paint. > As an aside to this with the lamers trophying the mats. Most often the > mats are intact so someday they could again be spares. True. > The best one I've ever seen was not real but instead used small nuts and > three colors of wire to make a real looking mat of some 64 or 128 bits. What size nuts? > I'd bet that with the right currents and timing you could even store data > in it. Oy! The core circuit that I copied for my 12th-grade drafting project used 7.5VDC as the half-voltage. How much oomph would it take to induce a stable magnetic pattern in a steel nut?!? I would think that enameled insulation would cook right off the wire. Anyone with a EE degree and a copy of Spice care to take a stab at it? -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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For the contest...

by gentry＠zk3.dec.com

Okay, I have been able to test the routine, and in fact it did work first time it executed... It didn't assemble first time because I had left out a local symbol, but with that corrected it built on the second try. In designing the algorithm I used, I noted that converting to Roman is the same as converting a binary value to decimal (finding the digit 0-9 for a given power-of-ten) but with the added step of converting that digit to the appropriate characters for the given power-of-ten. The routine has a table of values which are used for successively subtracting a power of ten from the value until it has a digit 0-9 and a remainder (which is handled by decreasing powers of ten on successive passes through the loop). It also maintains a pointer to the current roman numeral corresponding with the current power-of-ten. The conversion for 0-3 is easy, it simply outputs the requisite number of the current roman numeral. For 4, it outputs the current numeral followed by the numeral one higher. For 5-8, it starts by printing the numeral one higher followed by 0-3 of the current numeral. For 9, it outputs the current numeral followed by the numeral two higher. At the end of each loop, the power-of-ten pointer is incremented to the next entry, but the pointer to the roman numeral is also incremented by two. This way, the 'current numeral' pointer is always pointing to 'M', 'C', 'X', or 'I'. Since no number in the range which can be converted required numerals above 'M', I only have to worry about C, X and I. The numeral one higher than each is, respectively, D, L and V. The numeral two higher than each is, respectively, M, C and X. That's it... I didn't get info on cycles, but I did for number of instructions, which I included in the comments for the routine. One last thing - since there are quite a few members in the family of pdp-11 CPUs, the code is written to run correctly on any one of them. There are no restrictions, so using the T-11 (as I think Allison mentioned) would be possible. Megan Gentry Former RT-11 Developer +--------------------------------+-------------------------------------+ | Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry(a)zk3.dec.com | | Unix Support Engineering Group | (home): mbg(a)world.std.com | | Compaq Computer Corporation | | | 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ | | Nashua, NH 03062 | "pdp-11 programmer - some assembler | | (603) 884 1055 | required." - mbg | +--------------------------------+-------------------------------------+ - - - - - .SBTTL CVBTAR - Convert Binary to Ascii Roman Numerals ;+ ; ; Copyright (c) 1999 by Megan Gentry ; ; CVBTAR ; Converts a binary value to string of ascii characters which ; represent the value in Roman Numerals. ; ; Call: ; R0 = Binary value to convert ; R1 -> Storage space for resulting string (nul-terminated) ; ; Returns: ; R0 = zero ; R1 -> Byte beyond end of nul-terminated string ; other registers are unaffected as they are saved and restored ; ; Notes: ; o Valid range for input is 1 to 3999. ; o Roman numerals are: ; M 1000 ; D 500 ; C 100 ; L 50 ; X 10 ; V 5 ; I 1 ; ; 60 words (120 bytes) of code ; 5 words (10 bytes) of data ; 7 bytes of text ; 3 words (6 bytes) of stack used ; ; Code ROMable: yes ; Data ROMable: yes ; Code Reentrant: yes ; Data Reentrant: yes ; Undefined opcodes: no ; Undefined behaviour: no ; ; Value Instructions executed ; 0 5 ; 4000 7 ; 1 78 ; 3999 185 ; 3888 220 ; ;- .PSECT .CODE. .ENABL LSB CVBTAR: ; Range check the input TST R0 ;Is it valid? BLE 100$ ;Nope... CMP R0,#3999. ;Maybe, check upper limit... BGT 100$ ;Nope... ; Save registers and do some setup MOV R2,-(SP) ;Save R2 MOV R3,-(SP) ; and R3 while they are used MOV #BTDTAB,R2 ;R2 -> Decimal conversion table MOV #ROMCHR,R3 ;R3 -> Roman numeral character list BR 20$ ;Just starting conversion... ; Head of the loop 10$: TST @R2 ;End of the conversion table? BEQ 90$ ;Yep, conversion should be complete 20$: MOV R0,-(SP) ;Save current binary on stack CLR R0 ;Reset R0 for conversion 30$: INC R0 ;Bump count for this digit SUB @R2,@SP ;Reduce by current factor of 10 BHIS 30$ ;Continue if still positive... ADD (R2)+,@SP ;We went too far, add it back ; (and bump conversion table pointer) ; remainder is still on stack DEC R0 ;Reduce the count BEQ 80$ ;If zero, no characters to output ; Here we convert the decimal digit to Roman Numerals CMP R0,#9. ;Is it a nine? BNE 40$ ;Nope... MOVB @R3,(R1)+ ;Yes, it converts to current numeral MOVB -2(R3),(R1)+ ; followed by the numeral two higher BR 80$ 40$: CMP R0,#4. ;Is it a four? BNE 50$ ;Nope... MOVB @R3,(R1)+ ;Yes, it converts to current numeral MOVB -1(R3),(R1)+ ; followed by the numeral one higher BR 80$ 50$: SUB #5.,R0 ;Is value five or greater? BLT 60$ ;Nope, in range zero to three MOVB -1(R3),(R1)+ ;Yes, prefix with one higher numeral SUB #5.,R0 ; followed by one to three current 60$: ADD #5.,R0 ;Return value to range zero to three BEQ 80$ ;It was zero, nothing to do... 70$: MOVB @R3,(R1)+ ;Store a numeral DEC R0 ;More to do? BGT 70$ ;Yep... ; Tail of the loop 80$: ADD #2,R3 ;Bump the numeral pointer by *2* MOV (SP)+,R0 ;Pop the remainder (already popped ; the power of ten pointer) BNE 10$ ;More conversion to do if non-zero ; Clean-up 90$: MOV (SP)+,R3 ;Restore previously saved R3 MOV (SP)+,R2 ; and R2 BR 110$ ; Out-of-range string 100$: MOVB #'*,(R1)+ ;Out-of-range conversion string ; String termination and return 110$: CLRB (R1)+ ;String is to be nul-terminated RETURN .DSABL LSB ; Conversion data .PSECT .DATA. ; Binary to decimal conversion table BTDTAB: .WORD 1000. .WORD 100. .WORD 10. .WORD 1. .WORD 0 ; ** Table Fence ** .PSECT .TEXT. ; Roman Numerals (1st, 3rd... entries match entries in BTDTAB) ROMCHR: .ASCII /MDCLXVI/ .EVEN .END

27 years, 1 month

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OT: City Names

by Philip.Belben＠pgen.com

>> Well I was at an American run management course last year in Newcastle. One >> of the (male) attendees made the comment that he was cold and that he was >> going to get a jumper. This caused a hysterical reaction by one of the >> female presenters - apparently from her part of the USA a jumper is a dress! > > Farzino, a "jumper" is a dress anywhere in the US, specifically a > dress of a style rarely worn once puberty kicks in. Possibly the > standardisation of that nomenclature resulted from the fact that > that's what was used in the old Sears-Roebuck catalogs that were > distributed nationwide. That sounds like what I would call a "pinnafore dress". In the UK a Jumper is usually a sweater. The only exception I have met was in the _Manual of Seamanship_, published by the Admiralty in (I think) 1938, where it lists the kit issued to sailors, with illustrations. There the sweater is called a "Jersey", and "Jumper" refers to something resembling a football shirt. Well, the top half of a sailor suit anyway :-) Philip.

27 years, 1 month

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SoCal Vintage Computer get-together

by jpl15＠netcom.com

I was just wondering (mainly for refreshment purposes) if any ListMembers in the Southern California area who might be thinking of gathering at my place after TRW for a vintage computer crawl... might drop me a line or mention you are interested... I have somewhat limited parking as well, and I was just trying to get an idea. If any SoCal Classiccmp List Members are reading this and haven't yet read the previous invitations, I am sponsoring a Vintage Computer Collection open house this saturday... e-mail me for details or see previous messages. Cheers and Thanks! John

27 years, 1 month

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z80 timing... 6502 timing

by edick＠idcomm.com

-----Original Message----- From: Hans Franke <Hans.Franke(a)mch20.sbs.de> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Tuesday, April 20, 1999 4:49 AM Subject: Re: z80 timing... 6502 timing >> Some things in this contest that sound reasonable to me; > >> Input and output are to memory resident buffers. > >> Inline code is too boring, and subrountine calling too important, so the >> "task" should require perhaps modules; maybe make the contest half a dozen >> subroutines which get called from a contest defined main program (using >> some typical non asm language like C or pascal). > >> Contest submissions could be a simple binary file, file length, predefined >> jump table for subroutines, the actual code. Some third party, can run the >> code and time it on the hardware of their choice. > >Nice, but with these things, like internals of the system for input/output, >binary and similarities, you tie again all down to a single system to >use - we loose the idea of a cross platform competition where only basic >processor features are measured (see also the subject). > >Gruss >H. > >-- >Stimm gegen SPAM: http://www.politik-digital.de/spam/de/ >Vote against SPAM: http://www.politik-digital.de/spam/en/ >Votez contre le SPAM: http://www.politik-digital.de/spam/fr/ >Ich denke, also bin ich, also gut >HRK

27 years, 1 month

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heads up; OSI Challenger 1P

by SUPRDAVE＠aol.com

In a message dated 20/04/99 10:35:53 Eastern Daylight Time, george(a)racsys.rt.rain.com writes: << In the mean time I notice the ebay bid is up to $180. I wonder what a c4mf or a c8df would fetch? George >> harrumph, even an IBM pc convertable (5140) was up to ~$120 yesterday! i knew i shoulda bought that one i saw last week for cheap...

27 years, 1 month

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heads up; OSI Challenger 1P

by CLASSICCMP＠trailing-edge.COM

>that were clearly under 1.4kw. The codes are aimed at providing reasonable >power. Here a 15A/115v is the nominal and 115V/20A is a max No, it isn't. I have several 115V 30A circuits in my computer room - this being an extremely common rating on the power controllers used in smaller DEC systems - and looking at the codes and the Hubbell catalog it would seem that 60A circuits are standard things as well. -- Tim Shoppa Email: shoppa(a)trailing-edge.com Trailing Edge Technology WWW: http://www.trailing-edge.com/ 7328 Bradley Blvd Voice: 301-767-5917 Bethesda, MD, USA 20817 Fax: 301-767-5927

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Allison J Parent <allisonp(a)world.std.com> wrote: > <Any idea how to estimate the gauge? > > You'll have to mic it once the diameter is known you can look it up give > or take the enamel insulation. OK. Can do. > <What size nuts? > > Small, looked like #2. Can you translate that to a size? I can imagine the size of a #4 nut (I have several). I can't clearly picture how big the O.D. of a #2 would be. > ...A good material for this is hypersil commonly used for transformers. Used for the windings or the core laminations? On the topic of core size vs switching speed, I'd always assumed the drive to minaturize core was driven by the economics of memory density. I never considered memory speed. -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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Old computer books for laymen?

by ds_spenc＠alcor.concordia.ca

Hi, I was just looking at some of the books I've collected over the years (trying not to study for the exam I have tomorrow morning) and I spotted an old book entitled "Teach Yourself Electronic Computers". It's from the Teach Yourself Books series, (c)1962 The English Universities Press Ltd. Other books in the series include "Teach Yourself Algebra", "Teach Yourself Arithmetic", "Teach Yourself Geometry", "Teach Yourself Atomic Physics" (<- I kid you not!) etc, so it seems to be a book for the non-geek. The book is actually pretty good! What other early computer books were there for the reasonably non-geekish? -- Doug Spence ds_spenc(a)alcor.concordia.ca http://alcor.concordia.ca/~ds_spenc/

27 years, 1 month

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CP/M as an RTOS (was Re: Dumb OS question)

by allisonp＠world.std.com

<Which is not so much because CP/M or DOS actually is an RTOS (they aren't) <but that they don't get in the way of the programmer. The programmer is <free to write his own interrupt handlers, and even a task scheduler. < <Note that this very feature that makes such an OS potentially usable for <real-time systems is exactly what makes them poor choices as platforms <for general-purpose computing. Too much code gets written that works aroun <the OS for no especially good reason. < <Note that a "proper" RTOS both doesn't get in the way, *and* provides <useful real-time services. Which some old timers to comp.os.cpm may remember the firestorm when I called CP/M a file system and not an OS... ;) Allison

27 years, 1 month

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about cdroms...

by rlaven＠shore.intercom.net

I have a couple Panasonic cdroms that work with an ISA soundcard. Full set of drivers and installation software also. -rob-

27 years, 1 month

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IBM Optical drive questions

by roblwill＠usaor.net

Does the 3431 need a special type of disks, or do they all use the same type of disks? -Jason -----Original Message----- From: SUPRDAVE(a)aol.com <SUPRDAVE(a)aol.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 9:29 PM Subject: Re: IBM Optical drive questions >the type 3431 is rewritable. >the 3363 is write once- read many. >

27 years, 1 month

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

> >> One other thing I'd say, though, is that it's perhaps a bit questionable >> publishing code as yet because it will pollute the idea pool (no reflection >> on the quality of the submitted code) in that those who read it over (which >> I haven't for that reason) will potentially have their own approach >> influenced by seeing someone else's. > >Or they'll find ways to improve on it, which is what gives this whole >seemingly pointless exercise actual meaning and purpose. > >Sellam Alternate e-mail: dastar(a)siconic.com >--------------------------------------------------------------------------- --- Careful now! What I find better may not be better to you. It depends on your goals and outlook. I'd have liked it better if the initial phase had been without code listings and description of the approach chosen. Nevertheless, there's not much harm done. One who wishes to be entirely original doesn't have to peek. Dick

27 years, 1 month

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z80 timing... 6502 timing

by edick＠idcomm.com

It's called an epiphany, Sam. You know . . . a moment of clarity . . . goodness knows one seldom gets to enjoy such an event. Dick -----Original Message----- From: Sellam Ismail <dastar(a)ncal.verio.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 4:09 PM Subject: Re: z80 timing... 6502 timing >On Mon, 19 Apr 1999, Richard Erlacher wrote: > >> I don't know why this has to be so complicated. There need to be > >My god! Dick just had a revelation!! > >Sellam Alternate e-mail: dastar(a)siconic.com >--------------------------------------------------------------------------- --- >Don't rub the lamp if you don't want the genie to come out. > > Coming this October 2-3: Vintage Computer Festival 3.0! > See http://www.vintage.org/vcf for details! > [Last web site update: 04/03/99] >

27 years, 1 month

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

Your points are valid. I didn't intend building a new computer to be seen as a major construction project. It can be done with a processor, an oscillator can, a PAL, two memory IC's, and a UART, e.g. 16C450. As I said, it should take very little time, and the circuit could be built with both processors in the same circuit, perhaps with only one inserted at a time. It's not necessary, but it's the cleanest way to do the job if you want to participate yet haven't got a running system with one or both of these processors. By the way, if I were picking a processor for almost any job, these would be pretty far down the list, not because they're bad, but because others are so much more convenient. One other thing I'd say, though, is that it's perhaps a bit questionable publishing code as yet because it will pollute the idea pool (no reflection on the quality of the submitted code) in that those who read it over (which I haven't for that reason) will potentially have their own approach influenced by seeing someone else's. There ought to be a bit of time allowed to pass while folks contemplate the cosmic oneness and decide what they'll do. Dick -----Original Message----- From: Sean 'Captain Napalm' Conner <spc(a)armigeron.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 1:58 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) >It was thus said that the Great Richard Erlacher once stated: >> >> Well, I recall that someone said, a while back, that the devil's in the >> details. > > I'll say 8-) > >> What I'm trying to do is place boundaries around this problem for >> purposes of understanding its limits. Others who attempt to replicate your >> work on other processors will want to know these things. From your >> statement that the process produces a result of '*' for an invalid input, >> which, apparently would include negative values, non-integers, and integers >> of value 4000 or greater. If the input is presumed to be unsigned integer, >> that solves much of the problem. Now, you want to store the output in >> memory, presumably as ascii characters, presumably as a null-terminated >> string, and perhaps (optionally) echo it to the screen in the aftermath of >> your run. Does that sound like a reasonable thing to do? > > Yes. The actual code being timed is the conversion only, not the output >part, which is why the conversion is being stored in memory. > >> How do we tell this program what string of numbers to convert? Is this >> someting you want to put into memory as a null-terminated string of binary >> values, or would you prefer a single word for each value, with a null >> terminating the input array or a fixed string length? > > Well, if it's extended to read in a Roman number and covert it to binary, >then yes, you read from a NUL terminated string. That way, you can test >both sides of the program. But that's IF it's extended. I've yet to see >anyone else offer any code for the presented problem. > >> > I liked Sam's suggestion of ``printing to memory'' as a way to avoid the >> >complications of I/O in this, and if I didn't make this clear that the >> >conversion was to be stored in memory, I'm sorry. >> >> That should work. In fact, input could be done that was as well, placing >> the input in memory and then executing the program from a debugger or with a >> call from a HLL. > > Which is why I specified that the conversion program be callable as a >subroutine---to isolate the program from the specifics of the operating >system/monitor used to test it. > >> > I'm a software guy---building computers isn't exactly my forte. Besides, >> >if I say my code only requires 200 bytes of memory, and I can't figure out >> >how to build a computer with 200 bytes of memory (pretty easy for me 8-) >> >then that means I have 56 additional bytes to play with, maybe by adding >> >code to run blinkenlights or something. >> > >> > Besides, who wants to build a computer for this? Okay, except for Tony? >> >> That's the ultimate test, though, isn't it? > > If (and it's a big if) I build a computer, it's going to be based on a 32 >bit chip minimum (like the 68k or ARM). And it's not going to be for this >contest either 8-) > >> >> How is the 6809E relevant to the timing of the Z-80 and 6502? >> > >> > Nothing at all, except as an outside reference. That, and I don't really >> >know Z80 or 6502 code (nor do I have development systems for these chips). >> > >> Its certainly an outside reference. It may be a challenge for everyone to >> improve on it. . . We'll see, I guess > > I'm sure a cycle or two can be shaved off here and there, but I haven't >gone back over it myself. Heck, I've yet to see anyone comment on the code >itself. > > -spc (Or are we having more fun discussing the problem than working on > it?) >

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by allisonp＠world.std.com

<Any idea how to estimate the gauge? I know I'd need red and green enameled <perhaps another color like yellow? I also wonder what they used to insulat <the splices? It appears to be some kind of paint. You'll have to mic it once the diameter is known you can look it up give or take the enamel insulation. <What size nuts? Small, looked like #2. <Oy! The core circuit that I copied for my 12th-grade drafting project use <7.5VDC as the half-voltage. How much oomph would it take to induce a stabl <magnetic pattern in a steel nut?!? I would think that enameled insulation <would cook right off the wire. Keep in mind using say 30ga wire and the current could be in the several amps range as it's a pulse (a big one!). The total time would still be short. For a practical example a suitable ferrite could be used and there are plenty of suppliers. To do it with steel (not iron) nuts you'd have to do some pulse testing using one and a single turn of wire to find the switch point (push it with a bipolar narrow pulse). a second wire (a few turns) can be connected to a scope. Increase the drive to the first wire until you see it start switching. the BH switch point will be noticeable if the core has usable hystersis (fails otherwise). A good material for this is hypersil commonly used for transformers. I think the cores of the late 50s used that with a dimension of 50mils OD and about 5turns of 0.1mil thick material. Large cores are less critical and give a bigger kick as a responding signal. The penelty is that large cores switch slowly and have really big half select currents. The latter is not a problem with modern semis but in the late 50s early 60s transistors that could switch fast were also too slow and tubes didn't switch high currents well. mades doing core very hard. A tidbit of design history extrapolated from design of the TX2 (an Electronics Design article). Allison

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by ethan_dicks＠yahoo.com

--- Tony Duell <ard(a)p850ug1.demon.co.uk> wrote: > I think I'd try to move the 'core mat' (cores + wires) from the parity > plane to the data plane and then repair the defective one. Not feasible. The X-Y wires run from one side of the PCB to the other and intersect two bits at a time, 64 cores each. It's not like a PDP-11 board (the only other one that I can look at right now). > Yes, it's a lot easier just to swap sense wires round, but that seems like > a kludge to me. I suppose I can start with disassembling the mat that seems easiest to get to, then decide on what to do with the parity bit from there. > I guess it comes down to : Do you need to _use_ this machine (when > swapping the sense wires round makes a lot of sense) or are you tryign to > restore it (when you make as few mods as possible). I have more than one PDP-8/L. I could always borrow a known good core stack >from an -8/L and stuff that in the -8/i. It's not as if our hobby depends on the provenance of spares as a "genuine" antique would. It's virtually impossible to guarantee that any particular part was *never* replaced over the lifetime of the machine. In order, I would like it to A) work, B) be aesthetic. A+B is optimal. A alone is acceptable. -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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DEC RA81 need quick answer

by healyzh＠aracnet.com

27 years, 1 month

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by cmcmanis＠mcmanis.com

At 03:27 PM 4/19/99 -0700, Sellam wrote: >Unfortunately, my rant is not going to stop the lame-o's selling it from >hyping it up as some cool collectable, and it's not going to stop the >techno-wannabees from buying it to stick on their wall. Recent experience, Them: "We have a PDP 8/F." Me: "Does it have any memory." Them: "We think so, there are six boards in the back." Me: (could be good, two core stacks..) "What are the numbers on the top?" Them: "Three are labelled G104 and the other three are labelled G227." Me: "No, you don't have any memory for this machine." --Chuck [For the record a 4K core stack in an 8 consists of a G104, G227, and H220 card. It was the H220 card that had the actual core "mats" on it. The H220 card is often "liberated" from PDP-8's as a trophy/display item.]

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

-----Original Message----- From: Tony Duell <ard(a)p850ug1.demon.co.uk> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 6:44 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) >> >> On Mon, 19 Apr 1999, Richard Erlacher wrote: >> >> > My best guess would be that off-the-shelf systems will be what folks use to >> > program for this "challenge" if anyone does it. There were so few tools for >> > homebrew or single-board 6502 systems that I doubt anyone with other than an >> > Apple or an OSI will be interested. OTOH, it will be someone running CP/M >> > or the like on a Z-80 who enters on the Z-80 side. >> >> That's a highly ignorant statement. There were plenty of other 6502 based >> machines, including the Commodore 64, VIC-20, the various Atari 800 >> models. It's an ignorant statement, perhaps, as my kids had all these "video toys" at one time or another, but not made from total ignorance. I intentionally have ingnored them because they had integrated video, which makes it less than trivial to assess whether you're getting all the available bandwidth and also makes it unlikely you'll find a compatible Z-80. Remember, it was the goal at the outset to make a comparison of the two processors unencumbered by "special purpose" features. >Don't forget the BBC micro either. IMHO it was one of the best 6502 >systems ever (although it lacked internal expansion slots, which was a >pity). The BASIC was the second-best I have ever used (beaten only by >BASIC-09), and it has a built-in 6502 assembler. > >Now there's a thought. There was an option for the BBC micro that was a >Z80 second processor (it's not that rare either), clocked at 4MHz (IIRC). >The BBC's 6502 clocks at 2MHz most of the time, slowed down to 1MHz for >some I/O. Now you can compare the Z80 and 6502's speeds in the same >machine, simultaneously. This might be an excellent system on which to make a real comparison. It might even be one on which to run that matrix multiplication problem I proposed last week. I thought that would be good because it would require the machines to keep running for a week or two. It also would really show the difference in terms of time since it's such a big job. Of course mass storage would be a requirement for that. Commodore also made a dual processor machine, didn't they? A Commodore-128, I seem to recall . . . The power supply from the thing now powers a nicad charger . . . Dick >-tony >

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core stacks

by jlwest＠tseinc.com

ISTR that if you had a core set for an 8 that was "mismatched", the hardware handbook had the procedure for using a scope to "tune" a set into the appropriate range. Jay West

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by dastar＠ncal.verio.com

On Mon, 19 Apr 1999, Ethan Dicks wrote: > > I'd buy the core at $100, since that way you do have the working 8K for > > your PDP. Then I'd try to mend the broken core plane that you already > > have. If you fail, well you still have a machine with 8K in it (you'd be > > kicking yourself, I think if you couldn't fix the old core and couldn't > > still get a replacement). > > It seems the prudent thing to do, I was mostly just writhing about having > to pay double of what _I_ think it's worth. I was polling for a sanity > check to see if my expectations were unreasonable, or if the expectations > of those stick-it-on-a-bookshelf collectors were. I don't see what the big attraction to a core plane is. You stick it on your wall. Whoopee! Look at me, I have a core plane on my wall. Big fricken deal. Nobody even knows what it is anyway. From afar it looks like a black square. Closer up it looks like a piece of a window screen. Unfortunately, my rant is not going to stop the lame-o's selling it from hyping it up as some cool collectable, and it's not going to stop the techno-wannabees from buying it to stick on their wall. Sellam Alternate e-mail: dastar(a)siconic.com ------------------------------------------------------------------------------ Don't rub the lamp if you don't want the genie to come out. Coming this October 2-3: Vintage Computer Festival 3.0! See http://www.vintage.org/vcf for details! [Last web site update: 04/03/99]

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

This is a valid viewpoint, though I think, ultimately, the question to be answered pivots around which processor was potentially the most efficient of all its resources, including time. However, just the raw speed got a lot of discussion. In 1983, the 4MHz 6502 was "old hat" and the 8MHz Z-80H was readily available. However, AFAIK the peripherals for the Z-80H were not, and, in fact, I didn't ever see them. Somebody said they were out there at some point, but I've never seen them offered for sale. You could, of course, postulate that a given processor could be run at a given rate, whether it's true or not, but if you want a comparison of REAL parts running REAL code in a REAL environment, then you need something more than if you just look at what various vendors sold. Every design has compromises made, and, back in the early '80's, cost of memory was a factor, as was the assembly cost. In general, I saw lots of boards for lots of different processors designed to make the most efficient use of memory. Once we have a good idea of what you're trying to measure, you can make adjustments to the system variables. If you want to compute how fast a processor runs code with a given-speed-rated memory, you've got to design the most efficient memory interface you can and then adjust the processor clock for that. If you merely want to use a rate which trivially provides a baud rate generator with a convenient harmonic of the baud rate you intend to use, you can, I suppose design for that. I made the statement that it would take, at most, a couple of days to build a system which would allow straightforward programs to be run and thereby satisfy the requirement for a test system. I didn't really intend that people build a unique system just for this test. What I figured was that folks could look around the basement and see what they could find that would meet their needs. An old Apple-II would work if you compensate for its obtuse timing. Since they all seemed to have a serial console, almost any S-100 system would work. It's pretty hard to imagine how a limitation like your suggestion would apply. Newer processors addressed weaknesses in the older ones. One of those was ease of programming. In some cases, e.g. the 6809, the processor was designed with a regular instruction set and lots of addressing modes so as to make generating code easy. It didn't necessarily make it faster. I don't know how elegant such code will ultimately turn out to be. My best guess would be that off-the-shelf systems will be what folks use to program for this "challenge" if anyone does it. There were so few tools for homebrew or single-board 6502 systems that I doubt anyone with other than an Apple or an OSI will be interested. OTOH, it will be someone running CP/M or the like on a Z-80 who enters on the Z-80 side. That was why I thought a good simulator would be the best solution. Dick -----Original Message----- From: Bill Yakowenko <yakowenk(a)cs.unc.edu> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 5:21 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) >You'd normally expect that the winner of any such contest would be >the most recent processor, wouldn't you? So, if the cut-off date >was 1982, any processor that was released in late '82 should probably >beat any that was already available in 1979. Of course, if the 1979 >processor had a much faster version available in 1983 (like a higher >clock rate), that faster version wouldn't be legal with the 1982 cut- >off, because that wasn't around in 1982. > >So, I suggest that one way of judging cleverness of software hacks >is that they let an older processor beat a newer one. > >Judging that way, we don't even need a cut-off date. But anybody >coding for a 1999 processor won't have any way to win. > >Of course, then we need clear evidence when each processor became >available at each clock speed, and we can argue about when the chip >was *really* available (as opposed to being orderable, or just having >the spec available). > > Bill. > >

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by ard＠p850ug1.demon.co.uk

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z80 timing... 6502 timing

by edick＠idcomm.com

Yes . . . of course, I wasn't the one who thought a graphic display would be "nice" so one could see what was going on. Dick -----Original Message----- From: Sean 'Captain Napalm' Conner <spc(a)armigeron.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 4:10 PM Subject: Re: z80 timing... 6502 timing >It was thus said that the Great Sellam Ismail once stated: >> >> On Mon, 19 Apr 1999, Richard Erlacher wrote: >> >> > I don't know why this has to be so complicated. There need to be >> >> My god! Dick just had a revelation!! > > Now now ... > > -spc (No need to overly sarcastic here ... 8-) >

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Ancient disk controllers

by edick＠idcomm.com

I think I said some of the part numbers were badly managed in this set of products. It's quite confusing when you're ordering. I definitely ordered the board with the 1010 chip on it, knowing that it would physically fit my application, only to have the 1000-05 with the 8x300 and 1100 chipset arrive. These chips, (the 1100's) were really just msi parts easy to turn out while they tested the functions separately. The project was so far behind that they had to do something to recover costs. The 2010 chip wasn't available for quite some time. It was the version with the ECC capability built in. The 1010 was the one used in the PC, though, since it was available. By the time the 2010 became available, the RLL scheme used in the 5010 and other LSI's (from other vendors) became popular, and the ECC capability was ultimately not exploited via the 2010 in a PC application. Dick -----Original Message----- From: Tony Duell <ard(a)p850ug1.demon.co.uk> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 3:33 PM Subject: Re: Ancient disk controllers >> The functional differences were that the -05 versions were physically >> smaller (5.75 x 8 inches) and didn't support the 8-inch drives. Someone >> else pointed out that the WD1000-05 uses the WD1010 integrated controller >> rather than the 8X300 and the WD1100 chip set. Since the main difference >> between the WD1000 and WD1001 is that the latter supports ECC, I would guess >> that the WD1001-5 must use a WD2010 controller. > >The WD1001-05 uses the older chipset (or at least mine does). It uses the >WD1100-06 ECC/CRC logic chip rather than (I guess) the WD1100-04 CRC chip. > >The WD1001-05 is based on the 8x300 + control ROMs, and not a WD1010. > >-tony >

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z80 timing... 6502 timing

by edick＠idcomm.com

While what you say is certainly true, the page-zero usage is not dynamic, so, unless your task is very large and complex, page zero usage is therefore under the coder's control. I agree with your observation that the rate of memory usage is a good indicator of the rate at which a processor gets work done. The 6502 shines in that respect, in that the internal operations are generally overalpped with the fetch of the next instruction, with a few notable exceptions. Generally speaking, I've chosen processors with foreknowledge of what the device's most frequent tasks would be. For example, I picked a 65C02 for an application for which my boss had expressed a profound preference for the Z-80. I had to prove to him that, for OUR task, the 65C02 had a couple of features we could use very effectively and which the Z-80 didn't offer. It's always case specific. Dick -----Original Message----- From: Dwight Elvey <elvey(a)hal.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 2:55 PM Subject: Re[2]: z80 timing... 6502 timing >"Richard Erlacher" <edick(a)idcomm.com> wrote: >> I don't know why this has to be so complicated. There need to be >> constraints in order to ensure a level playing field, but since there are >> two related objectives, (1) to find out which of the two processors in the >> title of this message is "faster" and (2) to generate the fastest code for >> them for comparison. > >Hi > I always have to wonder about the meaning of faster. >Although I like the 6502 for a lot of things and would >say that it is often faster than a 8080 for many things, >I also know that resources like page zero get used up >quickly. Once these are gone, things tend to slow down. > I think we will continue to see that, like in the past, >most processors with about the same memory access speeds >will do about the same amount of work ( same bit count ). >On chip cache has changed that some but that just makes >another category. I would say any processor was superior >to another on small benchmarks unless the numbers were >in the 5X magnitude or more. Large application are more >useful in comparisons but it is hard to come up with >enough cross platform examples to make meaningful judgments. > I've always said, one should stick with what makes you happy. >Dwight >

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

I reached a similar conclusion as well, regarding the approach, though I've specifically avoided "peeking" at the submitted code. I've yet to write a line of code, as I'm looking at writing a simulator which will "run" the code and keep track of resources used at the same time. This requires changing existing code, and, at least in my case, changing working code means more or less the same thing as starting over, since I've not looked at the good code for a long time. Dick -----Original Message----- From: Megan <mbg(a)world.std.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 2:38 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) > >>> You naughty _naughty_ programmer! That's not at all in the spirit of >>> the competition! >>> (Wish I'd thought of it.) >> >>shhhhhhhhhh! Now they'll try to plug up the look up table loophole. >> >>Y'know, if the rules don't SAY what it has to be, ... > >The rules don't say you can't... but you do have to account for all >memory used, for code and data... > >I've coded a version for pdp-11s, but since I have yet to test it >(though of course it will work first time :-) I'm not going to >post it yet... > >It takes up 62 words (132 bytes), uses 4 words on stack and 9 words >of pure data space... when I've actually gotten a chance to try it, >I'll be able to report how many instructions it takes to do the >conversions (I suspect '1' is minimum and 3888 is maximum). I don't >know how to check on number of cycles, though... > >The algorithm is pretty straightforward... converting to Roman is >the same as converting to decimal except that once you have the digit >for a given power-of-ten place, you convert *that*... > >I wrote it before looking at the code which was posted, and I suspect >the algorithm is similar with the exception that I don't have a lookup >table for the digits... > > Megan Gentry > Former RT-11 Developer > >+--------------------------------+-------------------------------------+ >| Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry!zk3.dec.com | >| Unix Support Engineering Group | (home): mbg!world.std.com | >| Compaq Computer Corporation | addresses need '@' in place of '!' | >| 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ | >| Nashua, NH 03062 | "pdp-11 programmer - some assembler | >| (603) 884 1055 | required." - mbg | >+--------------------------------+-------------------------------------+ >

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

You bet! If there's a way for "them" to prevent you from beating them by being smart, they'll use it. I've been ground-ruled out a time or two when it looked like I might sweep 'em. Not in the coding arena, though. . . <sigh> Dick -----Original Message----- From: Fred Cisin (XenoSoft) <cisin(a)xenosoft.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 2:02 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) >On Mon, 19 Apr 1999, Bill Yakowenko wrote: >> Worrying about using 32K? For a simple little Roman Numeral pro... uh... >> <* light bulb goes on *> >> You naughty _naughty_ programmer! That's not at all in the spirit of the >> competition! >> (Wish I'd thought of it.) > >shhhhhhhhhh! Now they'll try to plug up the look up table loophole. > > >Y'know, if the rules don't SAY what it has to be, ... > > >OB_OT: A few decades ago, the Fremont race track used to have a 1200cc >aircooled "anything goes" class. Then they changed that to 1200cc >aircooled VW "anything goes" when I was 1/3 of the way through building a >car out of two Honda 600s. The Honda 600 resembles a Mini-Cooper, with >600cc 2 cylinder engine resembling a motorcycle engine, front wheel drive >with a trailer axle rear end; ~36HP, but ~45 with the Hawaiian head and >cam, plus ~10% more with some porting and polishing. By mounting an extra >front subframe where the rear used to be, it was 1200cc, 4 cylinder (2 in >each engine) >90HP, higher power:weight ratio than anything else in the >class, much cheaper to build than any of the serious contenders, 4WD, 4W >disk brakes, 4Wsteering (that REALLY takes some getting used to!) And >street legal. almost. >

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Program Challenge (was Re: z80 timing... 6502 timing)

by mbg＠world.std.com

>I must be missing something here. 9 does NOT produce the longest string >< 10, 8 does. (IX v VIII), and 3999 isn't the longest string. > >3888 would seem to produce: > M M M D C C C L X X X V I I I \0 >which is 16 characters, including null. Which was the reason I said 3888 would probably take the longest conversion time with my code... >BTW, what comes after M? Is it correct that in Roman numerals there can >never be 4 consecutive occurences of the same letter? (The original Y4M >"bug"!!!) Actually, I checked this in an old encyclopedia I had... both forms IX and VIIII could be and were used... As for what comes beyond it, a bar over the letters (called a 'vinculum') meant 'x 1000'. So MMM and <bar>III</bar> (meaning a bar over all three letters) were both acceptable as indicating 3000. Two bars indicated 'x 1000 x 1000'. Megan Gentry Former RT-11 Developer +--------------------------------+-------------------------------------+ | Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry!zk3.dec.com | | Unix Support Engineering Group | (home): mbg!world.std.com | | Compaq Computer Corporation | addresses need '@' in place of '!' | | 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ | | Nashua, NH 03062 | "pdp-11 programmer - some assembler | | (603) 884 1055 | required." - mbg | +--------------------------------+-------------------------------------+

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How scarce (valuable) is core for the PDP-8?

by allisonp＠world.std.com

<sort of a "one from column A, two from column B" approach. As long as the <sense amps don't balk at the extra resistance of doubling the length of <of the sense wire, it could work. Not likely but ther eis anotehr totally different problem, asymetric noise pickup masking the cores switching. Your further ahead fixing the mat. The wire used should present little trouble as fine wire can still be had. As an aside to this with the lamers trophying the mats. Most often the mats are intact so someday they could again be spares. The best one I've ever seen was not real but instead used small nuts and three colors of wire to make a real looking mat of some 64 or 128 bits. I'd bet that with the right currents and timing you could even store data in it. Also anyone holding a "core" based machine knows enough to keep spares as that is expensive to fix when your precious machine tool is dead. Down time for those people costs more than the computer that runs it. I say this as I have two Qbus PDP11 core sets both known good. Trophy never. Maybe one day I'll power them up again. Allison

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Program Challenge (was Re: z80 timing... 6502 timing)

by edick＠idcomm.com

Please see embedded comments below. Dick -----Original Message----- From: CLASSICCMP(a)trailing-edge.com <CLASSICCMP(a)trailing-edge.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 1:56 PM Subject: Re: Program Challenge (was Re: z80 timing... 6502 timing) >>This is a valid viewpoint, though I think, ultimately, the question to be >>answered pivots around which processor was potentially the most efficient of >>all its resources, including time. However, just the raw speed got a lot of >>discussion. In 1983, the 4MHz 6502 was "old hat" and the 8MHz Z-80H was >>readily available. However, AFAIK the peripherals for the Z-80H were not, >>and, in fact, I didn't ever see them. Somebody said they were out there at >>some point, but I've never seen them offered for sale. > >Of course, in the "real world", there are many other considerations >to systems design other than processor speed and the "my CPU can beat >up your CPU" arguments that are familiar to us from our schoolyard days >(and seem to continue interminably here.) > >This is, for example, why the number of 8051-descended CPU's that have >been shipped in the past 20 years is in the billions. (OK, very low >billions, but it's there.) (1 billion == 10**9, to not confuse the >folks who were educated outside the US of A.) > Yes, that's very true. The MC6809, for example, was touted as offering greater ease of programming, hence, less effort, hence better fit into applications with lower volume, among other interests. The 8051 is a completely different class of device, though. Its core is unquestionably the most widely used microcontroller core out there. There are those who claim that the PIC (Microchip) is going to take that market over are probably whistling into the wind, as although INTEL's share of that market has declined, the overall numbers from the dozen or so makers of 8051-core microcontrollers still dominate the market. The range of applications for which it is suitable is MUCH more comprehensive than that of nearly any other microcontroller, largely because there are so many variants with features otherwise needing to be added on and thereby increasing cost and circuit complexity. There are also some performance issues. There are some really quite fast versions of this guy. It has architectural features which reach back to its antecedent, the MCS48 family, yet its architecture supports operations with a fairly standard register set, and a fairly standard though minimal set of registers. It has several of these, as do some other micros, but one doesn't have to use the multiple register sets if it's not wanted. The 8051 is a single-chip microcontroller, though. It isn't really intended as the core processor of a more general purpose system though it's quite capable. The 6502 and Z-80 were intended as highly flexible processing units with external resources. Back when I was using the 6502 and Z-80, I used an 8748 or a 68701 or '705 when I needed a self-contained microcontroller. Dick >-- > Tim Shoppa Email: shoppa(a)trailing-edge.com > Trailing Edge Technology WWW: http://www.trailing-edge.com/ > 7328 Bradley Blvd Voice: 301-767-5917 > Bethesda, MD, USA 20817 Fax: 301-767-5927

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Program Challenge (was Re: z80 timing... 6502 timing)

by spc＠armigeron.com

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Sellam Ismail <dastar(a)ncal.verio.com> wrote: > On Mon, 19 Apr 1999, Ethan Dicks wrote: > > > I wish I had one of the stereo inspection microscopes... > > I have a similar device that was used for inspecting ICs. Its basically a > microscope with a fine adjustment platform... That's it. The one I'm thinking about has optional air bearings that can be clamped down with a foot pedal. You clamp the board into the frame, drag it around like a microfische, then lock it into place with the pedal. The field of view is adjustable, and can zoom in to entirely encompass a 1/4 W resistor or out to encompass several SMT ICs. > I assume you are thinking to replace the wire strand completely, and not > attempt to solder the two broken ends together? I need to get some pictures of this... Imagine a core plane... ||||||||||||||| --///////////////-- --///////////////-- --//XXX//////////-- --///XXX/////////-- --///XXX/////////-- --////XX/////////-- --///////////////-- --///////////////-- With the X's representing physically broken and/or absent cores. On my particular board, each bit of 4096 cores is a square approx 2" on a side (about 1/32" per core site), with the damage to two bits on the same edge of the PCB. I was originally planning on lifting the X and Y wires from one corner of the bit to be repaired, unthreading the cores only where necessary, and making any splices to the sense/inhibit wires at the edge of the core (as I belive there already are). If I scavenge wire and cores from the parity plane, I have more than enough raw material. If I attempt to sacrifice one bad bit for the other, I don't have the surplus wire (the X and Y wires must be preserved from edge to edge of the core PCB) I have just thought of another, more devious method, but on second thought, it would have to be clever indeed... Change the diode board such that the damaged bits are not both accessed at the same time (i.e. X32, Y16 on plane D4 is broken, but X32, Y16 on plane D3 is _not_ broken) and convert the two broken bits into two fields of 2048 cores each (and use the parity bit intact). It turns a 13-bit memory into a memory of 11 intact planes and two half-planes. I'll have to study the geometry to see if this is possible. Alternately, if the individual columns are intact, I could do sort of a "one from column A, two from column B" approach. As long as the sense amps don't balk at the extra resistance of doubling the length of of the sense wire, it could work. -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by allisonp＠world.std.com

<Do you have an opinion on how historically accurate is reasonable to <attempt? By this I mean that the parity plane (all by itself on a 3/4 <empty PCB) has no damaged cores. If I move the sense/inhibit wires from <its slot on the paddle boards, I can borrow them intact to act as one of <the damaged bits, I can then disassemble the more damaged plane (or perhap <the less damaged plane depending on where the damage is easier to get to) <and only have to repair _one_ plane. Your odds of success are much higher and it will be far less difficult. <In short: more like the original - disassemble the parity plane, removing <it from the stack, converting a 13-bit broken stack with 4 PCBs to a 12-bi <working stack, or, disassemble a broken plane, swap the data wires from it <to the parity plane, keeping all four PCBs inside the stack. The second <solution seems to make more sense from an effort and safety standpoint, th <first solution seems to me to be more "pure". In the era, if it were not used for parity (that wasn't common) then plane would then be considered "spare". Since an 8L was maxed (it could be hacked larger) as a 8kw machine that would be a nice box. Allison

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FS: Russian computer

by adavie＠mad.scientist.com

I've been offered a Russian Computer - "So, the computer 'Elektronika MS-1502' is IBM-compotable, it likes IBM PC. It has a monitor, a memory volume 512 kb. It works with using a recorder, but if there is a device it can work with using a drive." This is probably too big for me, and sideline to my interests. If there's anyone on the list who would like to arrange to buy this machine from it's owner (it will be relatively cheap, I'm sure), then please contact me privately on adavie(a)mad.scientist.com and we can talk about your needs. You will, of course, have to arrange shipping out of Russia. I can handle payment for you. I have no financial or other interests in this machine, other than trying to find a buyer as a favour for this Russian gent who supplies me with calculators. Cheers A

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by CLASSICCMP＠trailing-edge.COM

>Unfortunately, my rant is not going to stop the lame-o's selling it from >hyping it up as some cool collectable, and it's not going to stop the >techno-wannabees from buying it to stick on their wall. Just wanting to point out that "display core" isn't a completely new phenomenon: Historically (going back at least 15 years), folks leaving the labs where I've worked - either retiring or moving on to other jobs - have been presented with core planes from machines that they worked with as "going away presents", frequently framed and behind glass. Ah, the memories!

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Program Challenge (was Re: z80 timing... 6502 timing)

by KFergason＠aol.com

In a message dated 4/19/99 4:12:54 PM Central Daylight Time, cisin(a)xenosoft.com writes: > I must be missing something here. 9 does NOT produce the longest string > < 10, 8 does. (IX v VIII), and 3999 isn't the longest string. > > 3888 would seem to produce: > M M M D C C C L X X X V I I I \0 > which is 16 characters, including null. > > BTW, what comes after M? Is it correct that in Roman numerals there can > never be 4 consecutive occurences of the same letter? (The original Y4M > "bug"!!!) > No. Apparently the modern usage of Roman numerals is different than the Roman usage. Romans were known to do VIIII to mean 9, and were not really consistent in their usage. Interesting article in the Houston Chronicle discussing this a couple of months ago. 1999 can be made at least 3 ways, so a decision had to be made on which way should be used. (Hollywood movies, etc) Kelly

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Repairing core (was Re: How scarce (valuable) is core for the PDP-8?)

by ethan_dicks＠yahoo.com

--- Tony Duell <ard(a)p850ug1.demon.co.uk> wrote: > > I kicked off this whole mess with... > > > > I have a chance to buy a 4kW core stack for the PDP-8/i (-8/L). It's > > more than I want to pay, $100. Then --- Tony Duell <ard(a)p850ug1.demon.co.uk> wrote: > > Well, I've not bought core for a few years, and I payed a lot less than > that. Me, too. > But I believe core is now soemthing of a collectable (alas by > people who are not going to use it :-() Sigh. :-P > [...] > > > OTOH, I do have a broken (20-30 fractured cores) -8/L stack that I've > > contemplated repairing. It's a parity stack, so I can scavenge wire > > and cores from the parity plane (or just use the parity plane intact > > as another bit, then use one pad of broken core to repair the other, > > less damaged pad of broken core). > What I would do : > > I'd buy the core at $100, since that way you do have the working 8K for > your PDP. Then I'd try to mend the broken core plane that you already > have. If you fail, well you still have a machine with 8K in it (you'd be > kicking yourself, I think if you couldn't fix the old core and couldn't > still get a replacement). It seems the prudent thing to do, I was mostly just writhing about having to pay double of what _I_ think it's worth. I was polling for a sanity check to see if my expectations were unreasonable, or if the expectations of those stick-it-on-a-bookshelf collectors were. > If you do manage to mend it (and I think it's possible to re-string > larger-sized cores by hand) These are fairly large... much larger than on a 4kW stack for the PDP-11/20, but that's a three-wire plane. > then either make a 12K machine (if you can do that)... Not inside the -8/i (massive backplane, room for CPU, EAE, 8kW core and lots of I/O options. The -8/L expansion box _might_ take a total of 8kW) > or sell one of the core units to another collector (and if $100 is > the going rate you could probably get that for it). Or, of course, keep > it as a spare. I vote spare unless the price of core soars by one or two orders of magnitude. > > of time spent, it's cheaper for me to work a few hours and earn the money > > that the core pirate wants; in terms of lessons learned, repairing a > > 30-year-old core stack would be a big thrill, *if* it worked. > > Sure. Fixing old computers rarely makes financial sense, but then hobbies > rarely do. If I were in this for the money, I wouldn't be in it for the money. :-) > But learning how to mend core memory is an interesting thing > to learn to do IMHO (if I had a broken core unit you can bet I'd be > trying to fix it...) Do you have an opinion on how historically accurate is reasonable to attempt? By this I mean that the parity plane (all by itself on a 3/4 empty PCB) has no damaged cores. If I move the sense/inhibit wires from its slot on the paddle boards, I can borrow them intact to act as one of the damaged bits, I can then disassemble the more damaged plane (or perhaps the less damaged plane depending on where the damage is easier to get to) and only have to repair _one_ plane. In short: more like the original - disassemble the parity plane, removing it from the stack, converting a 13-bit broken stack with 4 PCBs to a 12-bit working stack, or, disassemble a broken plane, swap the data wires from it to the parity plane, keeping all four PCBs inside the stack. The second solution seems to make more sense from an effort and safety standpoint, the first solution seems to me to be more "pure". Thoughts? -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Lawrence LeMay <lemay(a)cs.umn.edu> wrote: Someone else suggested: > > I'm not sure I do, either. Maybe he means Charles Lasner, a frequent > > contributor to alt.sys.pdp8 (aka PDP8-LOVERS) up until a few years ago? > > Bingo, Thats who I meant. Charlie is indeed most wise, if you can read through his reams of detailed answers. I have always found him to be a great help in ferreting out bizarre tidbits of trivia. Having been to his house in Queens, I can say that he does have quite the wide range of hardware knowledge, but I think even he would blanch at attempting to disassemble a core pad and scavenge the bits (literally) to repair a broken plane. I know I'm intimidated by the prospect, but I figure worst case I broke something that was already broken. I wish I had one of the stereo inspection microscopes that I used when I worked on the factory floor at a Lucent plant in Columbus. It has a sliding base and an optional pneumatic pedal to fix the jig in place. We used it to inspect solder fillets on SMT edge connectors for circuit packs (the AT&T name for a PCB) for phone switches. If I had one of those for a month, I could probably get the view necessary to attempt to thread hair-fine wire through the cores. I do have a Weller temp-controlled iron to avoid scorching the PCBs and I do have a 1/64" tip for it (normally, I use a 1/32" tip for general SMT rework). The only hard problem I have is how to test the memory without assembling the entire plane first (due to the interconnections between the diode matrix boards and the individual core plane PCBs). Someday, when I have better tools and *lots* of free time... -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

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z80 timing... 6502 timing

by edick＠idcomm.com

I don't know why this has to be so complicated. There need to be constraints in order to ensure a level playing field, but since there are two related objectives, (1) to find out which of the two processors in the title of this message is "faster" and (2) to generate the fastest code for them for comparison. If people want to perform the exercise on other than these two processors, that's fine. It might show that the quality of the code makes more difference than the relative speed of the processor, which shouldn't surprise anyone. It wouldn't hurt, at least. It won't show what the fastest, leanest, most efficient, or any other comparative of the various ways of coding the problem would be for those two processors unless there's 1:1 mapping for the instructions, however. Having more attempts submitted will undoubtedly teach someone something and that's good. What it will also do, is show everybody more innovative approaches to solving the problem. Dick -----Original Message----- From: Fred Cisin (XenoSoft) <cisin(a)xenosoft.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 5:20 PM Subject: Re: z80 timing... 6502 timing >> > >Sure! Let's have a driving contest to see who can drive the fastest, but >> > >first we all have to build our own cars. THAT MAKES AN AMAZING AMOUNT OF >> > >SENSE! >> > Shsssh! We're building a race track first. >> No, that's too simple. First we have to go terraform Mars so that we can >> build the race track there. We don't want to give anyone an unfair >> advantage by letting them race their cars in a familiar atmosphere. > >I'm having a little bit of difficulty with not being able to use modern >tools and materials for the metallurgy for building my engine. :-) >Will I have to build it on Mars, also? > >If you really want to see a drivers only contest, watch IROC racing (was >just on ESPN this afternoon) - a dozen identical cars, and in 40 laps, the >pack spread out to a few car lengths. The winner was a Pontiac. So was >the loser, and every other car in the race. I think that it is more fun to >watch an event where the vehicles differ. > >We really need two sections of the whole competition - one section with >fixed platforms, and one section permitting custom hardware. >

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IBM Optical drive questions

by SUPRDAVE＠aol.com

In a message dated 19/04/99 17:16:44 Eastern Daylight Time, roblwill(a)usaor.net writes: << My other question is if Optical disks are re-writable? I've talked to two people, and one of them says that Optical disks aren't re-writable, mangeto-optical disks are. The other person said that no optical disk is re-writable, and that only floptical disks are (isn't that a form of optical disk?) >> the type 3431 is rewritable. the 3363 is write once- read many.

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Program Challenge (was Re: z80 timing... 6502 timing)

by mbg＠world.std.com

>> You naughty _naughty_ programmer! That's not at all in the spirit of >> the competition! >> (Wish I'd thought of it.) > >shhhhhhhhhh! Now they'll try to plug up the look up table loophole. > >Y'know, if the rules don't SAY what it has to be, ... The rules don't say you can't... but you do have to account for all memory used, for code and data... I've coded a version for pdp-11s, but since I have yet to test it (though of course it will work first time :-) I'm not going to post it yet... It takes up 62 words (132 bytes), uses 4 words on stack and 9 words of pure data space... when I've actually gotten a chance to try it, I'll be able to report how many instructions it takes to do the conversions (I suspect '1' is minimum and 3888 is maximum). I don't know how to check on number of cycles, though... The algorithm is pretty straightforward... converting to Roman is the same as converting to decimal except that once you have the digit for a given power-of-ten place, you convert *that*... I wrote it before looking at the code which was posted, and I suspect the algorithm is similar with the exception that I don't have a lookup table for the digits... Megan Gentry Former RT-11 Developer +--------------------------------+-------------------------------------+ | Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry!zk3.dec.com | | Unix Support Engineering Group | (home): mbg!world.std.com | | Compaq Computer Corporation | addresses need '@' in place of '!' | | 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ | | Nashua, NH 03062 | "pdp-11 programmer - some assembler | | (603) 884 1055 | required." - mbg | +--------------------------------+-------------------------------------+

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Program Challenge (was Re: z80 timing... 6502 timing)

by yakowenk＠cs.unc.edu

] How much memory is used can be defined in two ways. (a) the number of ] bytes, and (b) how much contiguous memory must be present in order to allow ] the code to be implemented. It requires 200 bytes of RAM is not a valid ] statement if that RAM has to be scattered over a 32-KByte range. ... Worrying about using 32K? For a simple little Roman Numeral pro... uh... <* light bulb goes on *> You naughty _naughty_ programmer! That's not at all in the spirit of the competition! Bill. (Wish I'd thought of it.)

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How scarce (valuable) is core for the PDP-8?

by lemay＠cs.umn.edu

> When I mentioned the chance to buy a 4kW stack for the PDP-8/i for $100... > > --- Lawrence LeMay <lemay(a)cs.umn.edu> responded: > > > Actually, that's probably a reasonable price. > > Foo! Well, I didnt say that I would pay $100... Or that it was a great price. But it might be a fair price. Of course, If i didnt already have a bunch of core of various types, and if i needed it to restore a pdp8 system (which would be at the absolute top of my list to do, as the first computer I ever saw, and every used, was a PDP8/e) then I would probably pay it. And i'd be cursing at whatever the past 20-30 years had done to make the board not work anymore ;( And i'd probably try to locate Lassiter and see if my some miracle he could repair the board, etc. But, thats just me. To me, having a PDP8/e is the ultimate dream machine. That, and having the room to store a PDP8/e... -Lawrence LeMay > > > Core memory boards, probably non-working, have been going for a high price. > > I got sniped for a PDP-11 double-core stack this weekend, backplane included, > that went for $38, no reserve. > > > Age and a nice visible setup increase the price. > > The core stack for a PDP-8(i|L) is older than much of what's on the > market, but none of the good stuff is visible at all on it. > > > Now, I havent seen the memory in question. but the pdp8/e core > > memory i've seen is all covered by a clear plastic shield. This > > increases its value as a display piece, as you can easily see > > all the core, and its all protected. > > It's hard to describe the arrangement, but the core plane in question > here is a block with two edge-connectors on either side, "dual-height" > as they say, but it's much thicker - let's try bad ASCII art to illustrate... > > > ######## ######## > xxxxxxxxxxxxxxxxxx == ######## ######## > ######## ######## ######## ######## > > core planes paddle-boards with wire harness > > The outside of the core plane part is covered in a "diode matrix", with > a wad of twisted-pair wires that go off to paddle-boards, one for the > sense bits, one for the inhibit bits. The address lines come up the diode > boards, the data comes up and down the paddle-boards. > > There are several PCBs with core in the core stack, 4-bits per layer with > an optional parity layer that has one pad of bits and three pads of core-less > X-Y wires. None of this is visible when the plane is assembled, and it's > soldered together with lines of wires going up and down the planes. > > > Of course, in order to use the core on a pdp8/? you would need > > a couple of support boards in addition to the core plane board > > itself. I would say that just the core plane, being of a nice > > size, and being very good 'visually' to display, and somewhat > > because its a PDP8 series board (nostalgia value), that its > > probably worth $100 all by itself. If it comes with the 2 support > > boards and the top connector things at that price, then i'd say > > its a bargain. > > You are thinking of newer hardware. The pre-OMNIBUS 8's have a wad of > individual, single-height cards that contain the sense-amps and the inhibit > drivers. I have a pile of them from an -8/L that someone else had already > begun to strip for parts before I bought it (it also happens to contain the > only DEC lock that does *not* use the XX2247 key). I'm not worried about > the analog stuff... I need the core. > > Of course, as Allison pointed out, I could always stick in a lump of battery- > backed static RAM. I was contemplating building a wiring harness to adapt > an RX8E on the back of either an -8/L (which has 8kW of core out of 12kW in > an expansion cabinet) or on the -8/i. I would use berg connector pins to > stick the wires on the back side of the backplane (to avoid soldering, of > course; but worst case, I just wire-wrap on a connector or two and use > sheilded ribbon to move the signals around. > > The joys of restoration in a market of scarcity. :-P > > -ethan >

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Q-Bus and Unibus to ATA info

by clintw＠colorado.cirrus.com

> From pechter(a)pechter.dyndns.org Mon Apr 19 14:06:36 1999 > Reply-To: classiccmp(a)u.washington.edu > Sender: CLASSICCMP-owner(a)u.washington.edu > Precedence: bulk > From: Bill Pechter <pechter(a)pechter.dyndns.org> > To: "Discussion re-collecting of classic computers" <classiccmp(a)u.washington.edu> > Subject: Re: Q-Bus and Unibus to ATA info > In-Reply-To: <011101be8a92$47a92bc0$5d01a8c0(a)p2350.ecubuero> from emanuel stiebler at "Apr 19, 1999 12:27:26 pm" > MIME-Version: 1.0 > Content-Transfer-Encoding: 7bit > X-Phone-Number: 908-389-3592 > X-OS-Type: FreeBSD 3.0-Stable > X-Listprocessor-Version: 8.1 -- ListProcessor(tm) by CREN > X-Lines: 33 > > > > >On the other hand, I have been pondering the development of a ATA > > >drive controller that emulates MSCP (and possibly TMSCP). > > > > I'm sitting on the layout of one ;-)) > > > > Problem is, you pay appr 100$ license fee for MSCP, and another 100$ for > > TMSCP. > > > > emanuel > > > I'd pay $200 + parts for a board that would do MSCP and run my 11/23's > with an IDE drive. > > Actually, I'd love to find a SCSI or IDE controller with DEC OS support > for the QBUS. > > > Bill Take a look at the CQD-220/TM or CQD-240/TM at www.cmd.com. I have two CQD-240/TM that I bought recently (25-Jan-99) from Ficomp (www.ficompinc.com), that I am using in my uVAX II with Ultrix 3.1. These boards emulate MSCP and TMSCP. According to the technical manuals on CMDs website, these boards work in: LSI-11/23, PDP-11/23+, Micro-PDP-11/53, 11/73, 11/83, 11/93, uVAX II, uVAX III, VAX 4000 and DECSystem 5400 systems. They support RT-11, TSX, DSM-11, ISM-11, RSX, RSTS, VMS, UNIX, ULTRIX, and other operating systems which use DU/TU drivers. I am happy enough with the ones I have, I am going to buy a Unibus one for my 750 when it arrives. clint

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

I have a chance to buy a 4kW core stack for the PDP-8/i (-8/L). It's more than I want to pay, $100. My question is, what are these things going for these days? I don't really *need* it. The guy selling it has more core than this that he saved from a "recycler", but he's in it for the money, not out of a love for classic machines. Most of his memory, he sells to people who want something to stick on the shelf and "ooh" and "aah" at. :-( So... for those people who have been trying to get core over the past year or two, what's it costing? I'm trying to decide if I want to grab this stack to put into my -8/i and bring it up to 8kW, an entirely optional project (I have all the other parts I would need for the upgrade from a PDP-8/L that I got in 1982 that was sold as parts-only, bad core, and most of the I/O and part of the CPU missing). I think he's charging too much, but maybe I'm disconnected with the current pricing. I do know that if I pass on it, there are several other people who are waiting for this exact piece, so it'll be sold one way or the other when I answer him. OTOH, I do have a broken (20-30 fractured cores) -8/L stack that I've contemplated repairing. It's a parity stack, so I can scavenge wire and cores from the parity plane (or just use the parity plane intact as another bit, then use one pad of broken core to repair the other, less damaged pad of broken core). Any thoughts out there on core repair? It's 1968 DEC core with, AFAIK a seperate sense and inhibit wire, which is both good and bad - good because the cores are larger than three-wire core, bad because I'd have to thread up, down and two diagonals. Of course, I could always sell the broken plane to a collector and use the money to fund part of this working stack. So many options. In terms of time spent, it's cheaper for me to work a few hours and earn the money that the core pirate wants; in terms of lessons learned, repairing a 30-year- old core stack would be a big thrill, *if* it worked. Thanks, -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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Q-Bus and Unibus to ATA info

by emu＠ecubics.com

Hi, -----Original Message----- From: Clint Wolff <clintw(a)colorado.cirrus.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 12:04 PM Subject: Re: Q-Bus and Unibus to ATA info >On the other hand, I have been pondering the development of a ATA >drive controller that emulates MSCP (and possibly TMSCP). I'm sitting on the layout of one ;-)) Problem is, you pay appr 100$ license fee for MSCP, and another 100$ for TMSCP. cheers, emanuel

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Program Challenge (was Re: z80 timing... 6502 timing)

by CLASSICCMP＠trailing-edge.COM

>This is a valid viewpoint, though I think, ultimately, the question to be >answered pivots around which processor was potentially the most efficient of >all its resources, including time. However, just the raw speed got a lot of >discussion. In 1983, the 4MHz 6502 was "old hat" and the 8MHz Z-80H was >readily available. However, AFAIK the peripherals for the Z-80H were not, >and, in fact, I didn't ever see them. Somebody said they were out there at >some point, but I've never seen them offered for sale. Of course, in the "real world", there are many other considerations to systems design other than processor speed and the "my CPU can beat up your CPU" arguments that are familiar to us from our schoolyard days (and seem to continue interminably here.) This is, for example, why the number of 8051-descended CPU's that have been shipped in the past 20 years is in the billions. (OK, very low billions, but it's there.) (1 billion == 10**9, to not confuse the folks who were educated outside the US of A.) -- Tim Shoppa Email: shoppa(a)trailing-edge.com Trailing Edge Technology WWW: http://www.trailing-edge.com/ 7328 Bradley Blvd Voice: 301-767-5917 Bethesda, MD, USA 20817 Fax: 301-767-5927

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Ancient disk controllers

by edick＠idcomm.com

It has to be close to the 1000 because of thee chipset used. However, the chipset deals with the drive-side of the controller, and not at all with the host interface. Consequently, the DAVONG folks, whose documentation for this baby is lying, even as I type, in my lap, accompanied by the four 360K! diskettes, did not see fit to describe this product in much detail in their user manual or installation guide. They didn't even tell you much about the hardware with which you presumably bought this baby. The usual assumptions were made, i.e. that you bought the system interface (which uses a SCSI-type 50-contact connector, hence the conclusion that it was SCSI, which it isn't) so they didn't include the signal definitions for the cables. The odd thing about the box is that there are numerous connectors. There's a power connector, a DA-15, an external drive connector on a DB-25, a drive control cable connector which is a DC-37, and one of those common 50-pin SCSI-1 connectors seldom seen on SCSI equipment except in pairs. There's no ID switch for the controller. Why they'd provide power from one powered box to another isn't clear. That's how it is though. It's likely from a functional standpoint that the controller works more or less like a WD-1000-series controller of the earliest type, i.e. without the WD1010 chip. These had a different arrangement of the registers, probably just inverted, as I recall, from that of the WD1010-chip type. They use a varactor-tuned VCO, just like the WD1000's and again unlike the smaller board with the WD1010 chip. The fact they use the Signetics microcontroller does suggest that these would be similar to the WD1000, but the WD1000 used an 8X300, which maxxed out at 4 MHz while the newer and "improved" 8X305 was called that because it had a few more instructions and features, and operated at 5 MHz. For now, that's all I've got about this DAVONG controller. Dick -----Original Message----- From: Tony Duell <ard(a)p850ug1.demon.co.uk> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Saturday, April 17, 1999 7:41 PM Subject: Re: Ancient disk controllers >> Connector J2 and J1 are together on one side of the long end (J1 is 34-pins >> with half of them grounds, J2 is 20 pins with pins 2, 4, 6, 8, 12, 16 and 20 >> grounded). J3, J4 and J5 are in line on a short end, 20 pins each, similar >> ground pattern to J2. J2 through J5 appear to have connections to a Motorola >> AM26LS32 and a TI AM26LS31 which I take to be some sort of analog chip. > >Those are almost certainly ST506-like data connectors (for up to 4 >drives). The 26LS31 and 26LS32 are differential line drivers/receivers >which can be used for these signals. > >> The final connector, J6 is 50 pins. >> >> J1 appears to be the control cable for an ST506 drive, J2-J5 appear to be >> data cables for talking to four drives. The interesting chips on the board >> include a N8X305N processor, some N82S181N ROMs, an N8X371N with leads going >> right to the 50-pin connector, and five socketed WDC parts copyrighted in 1980: > >Which pins are used on the 50 pin connector? Could it be pinned out as a >SCSI port. Or is it possibly some custom host interface? For example I >have here the data sheet for the WD1001 controller. It uses essentially >the chipset you mentioned. It has a 50 pin host connector, but it sure >ain't SCSI. > >> WD1100V-03, WD1100V-01, WD1100V-04, WD1100V-05 and WD1100V-12. There is a > >I have data sheets for those chips... > >-03 : Adress mark detector >-01 : Serial/Parallel converter >-04 : CRC generator/checker >-05 : Parallel-serial converter >-12 : Improved MFM generator. > >> crystal at 20Mhz in the analog section of the board and an 8Mhz crystal by > >20MHz/4 = 5MHz = standard ST506 data rate. >8MHz is a common enough clock for the 8x300 series of CPUs as well. > >> the processor. In the middle of the board are three vias that are labelled >> as if they are configuration pads, in an inverted-L, labelled "1", "2" and >> "3", with a "W" above them, > >What bothers me, if this _is_ a SCSI controller is that there seems to be >no way of setting the device address. > >My guess is that it's a sort-of WD1001 clone. > >-tony >

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Ancient disk controllers

by edick＠idcomm.com

It's like I wrote a few days ago. There was a bit of confusion about what was what. Several different forces at WD were shuffling for turf, apparently, and the prize, in this case, was the 1000 designation vs the 1001. They had data sheets about a 1000-08 controller but that never made the price list. I have several of the OLD (meaning with the 8X300 + WD1100 chipset) tuned for handling ST506 drives, but none for 8", though I tried to order them through distribution. Western send me several versions of the small board with the 1010, 1014, and 1015 chips as samples, but I couldn't get any of their offering for the 8" drives. I didn't need them, so it didn't really matter. I don't know how far back you remember, but the 8T31 is what they called an interface vector, in the 8X300 doc's, and what it really is, essentially, is a 74373 with built-in decode logic. It can work in either direction so you can use it in both input and output applications. The part is described in the OSBORNE series on microprocessors, in case anyone is interested. The 8X300 is a true RISC. it has 8 instructions and, on the original version, each one took 300 ns. on the version which was current in 1980, it was customarily used with an 8MHz clock which meant each instruction took 250 ns, and in 1981 they trimmed it down to 200 ns with their 8X305. These processors showed up in lots of tape controllers and the like, perhaps an occasional SMD, and at least one LAN application, though I don't know what the protocol was.

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Convergent Technologies System

by patd＠csis.on.ca

Hello: I recently acquired a Convergent Technologies system model CG-1000 miniframe system. Tried hooking up a dumb terminal with no luck. The system appears to be trying to boot from the hard disk but my guess is that the operating system has been deleted :(. Does anyone have any technical information on this system? I gather from searching the web that this system ran a flavour of Unix (RTOS?). Any and all info appreciated. Thanks. Here's some system specs for the curious: 68010 10 MHZ cpu 2 Meg ram 2 - ST251 hard disks Archive Corporation tape backup 5 1/4" floppy drive 2 - RS232 ports 1 - RS422A port 1 Parallel port Front panel says "Motorola Information Systems 6350" Regards Pat Del Vecchio

27 years, 1 month

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Q-Bus and Unibus to ATA info

by clintw＠colorado.cirrus.com

I have been using a CMD technology (http://www.cmd.com) CQD-2xx/TM SCSI <--> QBUS controller in my microvax II, and have been quite happy with it. It emulates MSCP and TMSCP, so no additional drivers are required. Unfortunately, at $800, it is about $800 more than I paid for the computer (sigh). The only down side is, Ultrix 3.1 won't work with a drive with more than 1.2Gb or so, but with some partition magic it works just fine. Also it will talk to my Archive Python DAT tape drive. On the other hand, I have been pondering the development of a ATA drive controller that emulates MSCP (and possibly TMSCP). There is a DEC document that describes MSCP (I don't have the part number handy). Does anyone have a copy they would give/sell/load to me? Thanks, clint > > I don't know if anyone noticed a USENET posting from the Ukraine about a DEC > Hobbyist site. It has pictures AND a bunch of files about connecting ATA > harddrives to a Unibus or Q-Bus system. I was interested in the idea of > using modern HD's so I ftp'd the data and have put it on my FTP site (the > one in Ukraine is, not surprisingly, painfully slow to respond) > > ftp://digital.dp.ua/DEC/ Original site > > ftp://zane.brouhaha.com/pub/dsu/ <- ATA files from original site > ftp://zane.brouhaha.com/pub/dsu.tar <- tar of above files > > It looks interesting, but it also looks like it will take someone a lot > better with the Hardware side of things than I am to make use of this info. > >From briefly looking at the Q-Bus adapter, it looks as if the chips are all > Soviet, which would probably make this more than a little difficult to use. > > Zane >

27 years, 1 month

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z80 timing... 6502 timing

by edick＠idcomm.com

It's true that may be more interesting when you have different vehicles, but if you're trying to determine which of two is faster, don't you focus on those two? Having lots of variations in the hardware only tends to muddy the water. Dick -----Original Message----- From: Hans Franke <Hans.Franke(a)mch20.sbs.de> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 8:57 AM Subject: Re: z80 timing... 6502 timing > >> If you really want to see a drivers only contest, watch IROC racing (was >> just on ESPN this afternoon) - a dozen identical cars, and in 40 laps, the >> pack spread out to a few car lengths. The winner was a Pontiac. So was >> the loser, and every other car in the race. I think that it is more fun to >> watch an event where the vehicles differ. > >> We really need two sections of the whole competition - one section with >> fixed platforms, and one section permitting custom hardware. > >Sounds like Formula 1 and Formula Volkswagen (Back in the 70's a >very popular over her - all cars based on VW Beetle). > >Gruss >H. > >-- >Stimm gegen SPAM: http://www.politik-digital.de/spam/de/ >Vote against SPAM: http://www.politik-digital.de/spam/en/ >Votez contre le SPAM: http://www.politik-digital.de/spam/fr/ >Ich denke, also bin ich, also gut >HRK

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How scarce (valuable) is core for the PDP-8?

by CLASSICCMP＠trailing-edge.COM

>> >> And i'd probably try to locate Lassiter and see if my some miracle he >> >> could repair the board, etc. >> >> >I don't get the reference. >Neither do I, and I'm the one who wrote it... >> I'm not sure I do, either. Maybe he means Charles Lasner, a frequent >> contributor to alt.sys.pdp8 (aka PDP8-LOVERS) up until a few years ago? >Bingo, Thats who I meant. Is Charles still with us? I haven't heard a peep from him since the mid-(Lasnerian)-90's. (Bonus points to anyone out there who was reading alt.folklore.urban back when "Lasnerian" was coined!) -- Tim Shoppa Email: shoppa(a)trailing-edge.com Trailing Edge Technology WWW: http://www.trailing-edge.com/ 7328 Bradley Blvd Voice: 301-767-5917 Bethesda, MD, USA 20817 Fax: 301-767-5927

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z80 timing... 6502 timing

by allisonp＠world.std.com

<> processor. The more rudimentary the processor, the more points you get. <> I choose the 4004. < <You have a _home micro_ based on a 4004? What the heck is it? TMS1000 chip. Allison

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How scarce (valuable) is core for the PDP-8?

by CLASSICCMP＠trailing-edge.COM

>> Well, I didnt say that I would pay $100... Or that it was a great price. >> But it might be a fair price. >> >> And i'd probably try to locate Lassiter and see if my some miracle he >> could repair the board, etc. >I don't get the reference. I'm not sure I do, either. Maybe he means Charles Lasner, a frequent contributor to alt.sys.pdp8 (aka PDP8-LOVERS) up until a few years ago? >> But, thats just me. To me, having a PDP8/e is the ultimate dream machine. >> That, and having the room to store a PDP8/e... >A PDP-8/e isn't all that large. Some of the peripherals can cause a >space problem... Even the disk drives are rather small - a fully configured system with multiple RK05's, DECtapes, a few ASR33's, and one of the fixed head disks weighs well under a half-ton, making it a "small" system by the standards of many :-). -- Tim Shoppa Email: shoppa(a)trailing-edge.com Trailing Edge Technology WWW: http://www.trailing-edge.com/ 7328 Bradley Blvd Voice: 301-767-5917 Bethesda, MD, USA 20817 Fax: 301-767-5927

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z80 timing... 6502 timing

by edick＠idcomm.com

Maybe we're talking about two different things, Sam. I thought we were going to put forth a specification for participants to code for whichever processor they wanted or both, just to see which one came out fastest, smallest, or whatever...est. You were the one who mentioned the graphics so one could see what was going on. What I had in mind was a computation, e.g "compute the product of three M x N x L matrices, where M, N, and L are <127, containing prime decimal numbers of not more than 511 and not fewer than 256 digits each". An environment has to be selected for a task like this. You know what I mean. There has got to be some limit on how much a process is helped or hindered by the environment. Dick -----Original Message----- From: Sellam Ismail <dastar(a)ncal.verio.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Saturday, April 17, 1999 4:15 PM Subject: Re: z80 timing... 6502 timing >On Sat, 17 Apr 1999, Richard Erlacher wrote: > >> Let's not start throwing up our respective hands in disgust! Nothing's been >> attempted yet. In fact, nothing's been suggested yet except a couple of >> things which at first inspection didn't seem like they'd work. Now, Hans >> Franke suggested something like a KIM-1. There's no reason one couldn't >> code for something LIKE a KIM-1, even the guys working the Z-80 side, but > >You want people to have to learn 6502 in order to participate in this? >So, I've never touched a Z80, but conversely you'd want me to have the >added burden of having to learn Z80 assembler if we chose to do this on >the Z80? > >I think part of the idea is to implement this exercise on different >processors so that we can all collectively learn how the code to perform >the same algorithm works on the many different varieties. > >> it's inappropriate to choose. If one wants the hardware, it should be the >> SAME hardware throughout the exercise, though. That's why I was suggesting >> a simulator. All that's really needed is a run to see if it actually will > >Ok, Richard. You go off and write this simulator, and design the board to >run it. Then when you're all done with this masterpiece, the rest of us >will have long been done with this little mental challenge and talking >about something more contemporary, like how two years prior the world >did not in fact end on the January 1, 2000. > >> execute and end up with the desired result when code is submitted to the >> hardware. A simulator would be adequate so long as it was trusted to give >> honest timing results. That way, nobody would have to risk burning his >> fingers. > >I think counting clock cycles would be a lot simpler, but that's just me, >always trying to find the sensible solution. > >Sellam Alternate e-mail: dastar(a)siconic.com >--------------------------------------------------------------------------- --- >Don't rub the lamp if you don't want the genie to come out. > > Coming this October 2-3: Vintage Computer Festival 3.0! > See http://www.vintage.org/vcf for details! > [Last web site update: 04/03/99] >

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IBM Optical drive questions

by roblwill＠usaor.net

Hello... I'm getting a couple of IBM optical drives (one internal, one external).

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Lassiter?

by af-list＠lafleur.wfi-inc.com

I assumed he meant John Lassiter of UNIX fame... Do I win the prize? Aaron

27 years, 1 month

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z80 timing... 6502 timing

by edick＠idcomm.com

I want to distance myself from the majority of this nonsense. Building a simple computer with a processor, a ROM, a full compliment of RAM, and a serial console interface is a 10-minute design and a 90-minute fabrication task. If it's designed to fit already existing firmware/software, it's even more or less practical to fit it into that firmware or software's understanding of what the hardware is that fits with it. That means that an operating system might be straighforward to accomplish in a day or two if there's software in the form of a decent monitor or OS to support it. HOWEVER, since there's little hardware support commonly applicable to both of the subject processors, let alone for a number of others, It's silly to consider anything but the simplest of hardware for a real-world implementation. I'm sure most people in any way familiar with the things we had to do back in the '70's will agree, that, from a hardware standpoint, building a single-board system with 64K SRAM, Whatever size of EPROM you like, overlapping it and disabled when copied into RAM, and a serial port is a no-brainer, requiring , as I previously said, about 90 minutes to wire-wrap. It might take longer if you have to find the parts. If you use a WD FDD/HDD card, it will take another 15 minutes to wire up the cable interface. If, however, you use just a WD1770 or 72 you have a floppy drive as well. For the Z-80,that means you have CP/M. I don't know what's comparable for 6502 development. If you simply stop after the serial console interface, say,a 16C450 off an obsolete but otherwise healthy PC serial board, you've got enough to run a decent debug monitor. I have a couple for the 6502, though I was wanting to incorporate the assembly/disassembly functions as well. That hasn't happened yet, and until I'm properly motivated, probably won't. Now I can't imagine why a graphics display, or anything so inane as that could creep into the consciousness of an otherwise perfectly sane person wishing to deal with one of life's fundamental mysteries, i.e. "which is really faster, the XXXX or the YYYY?" Dick -----Original Message----- From: Tony Duell <ard(a)p850ug1.demon.co.uk> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Saturday, April 17, 1999 7:40 PM Subject: Re: z80 timing... 6502 timing >> Well, while you're at it, why not add a hard drive, > >1 or 2 chips for a SCSI interface... > >> a graphics accelerator, > >More nasty, at least if you want to keep it 'classic'. If I'm allowed >bit-serial (like the MG1), perhaps a couple of dozen TTL chips at most. > >> a scanner, > >See above for a SCSI port > >> an ethernet adaptor, > >Oh, 3 or 4 chips... > >> a pencil sharpener, > >PIA chip + relay driver + relay to control sharpener motor. > >> and a juicer attachment? > >Ditto. > >> >> Jesus Christ! Can't anything be simple for you, Richard? This is a > >You call that _complicated_ :-) :-)... > >-tony >

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Seeking docs: HP 1000-F minicomputer

by jimw＠agora.rdrop.com

'nuff said? I saved a pair of these critters at the Paxotn auction, now need some docs so I can figure out exactly what I'm dealing with here. -jim --- jimw(a)computergarage.org The Computer Garage - http://www.computergarage.org Computer Garage Fax - (503) 646-0174 >>> Coming soon to www.computergarage.org - the CBBS/NW on-line archives >>> Coming to VCF III (2-3 October 1999) - CBBS/NW live!

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Lawrence LeMay <lemay(a)cs.umn.edu> wrote: > Well, I didnt say that I would pay $100... Or that it was a great price. > But it might be a fair price. > > And i'd probably try to locate Lassiter and see if my some miracle he > could repair the board, etc. I don't get the reference. > But, thats just me. To me, having a PDP8/e is the ultimate dream machine. > That, and having the room to store a PDP8/e... A PDP-8/e isn't all that large. Some of the peripherals can cause a space problem... -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

--- Marvin <marvin(a)rain.org> wrote: > > The only real measure I have seen is on ebay, although others can talk about > what goes on in the newsgroups. The last PDP-8i core stack ended at $76.00 > with 14 bids and the reserve was not met. The URL is: > > http://cgi.ebay.com/aw-cgi/eBayISAPI.dll?ViewItem&item=91272199 > That's me. I had the high bid. The reserve was $100. The seller is willing to sell to me first if I pay the reserve amount. I personally was not unhappy when the price was around $50. I didn't _really_ mind $76, but at $100, I'm forced to consider it hard. I mean, I already *have* working core, several stacks in working machines. I don't _need_ this, thus the debate. Thanks, -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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How to read recalcitrant floppies?

by jfoust＠threedee.com

At 11:52 AM 4/17/99 -0700, Ethan Dicks wrote: >I am attempting to back up some floppies from a project I did a few years ago. >The sets of 3.5" 1.44Mb IBM floppies have been stored in a box, in a cool and >dry room. Out of one set of 12 and one set of 15 disks, I have four disks >that have read errors that DOS won't get past, bad sectors and the like. > >Are there any tools to go divining on DOS floppies that work better than >an endless succession of "R"etries? Try several different drives on different machines. Drives can be out of alignment with respect to each other, and this includes the machine that wrote the disk as well as the machines that read them today. Try reading them on other types of machines, like Macs or Amigas with proper DOS-reading abilities. Another good trick is to hold the disk between your thumb and first finger, then whack each edge on the table-top. Also, get out the can of compressed air to clean out each drive before you try this, and open the shutter on each disk and blow them out, too. - John

27 years, 1 month

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How to read recalcitrant floppies?

by ethan_dicks＠yahoo.com

--- John Foust <jfoust(a)threedee.com> wrote: > At 11:52 AM 4/17/99 -0700, Ethan Dicks wrote: > >I am attempting to back up some floppies from a project I did a few years > >ago. > > Try several different drives on different machines. Done. Used a *new* drive in case my regular drive was dirty, too. > Try reading them on other types of machines, like Macs or Amigas with > proper DOS-reading abilities. That was my next trick. The Amiga reads disks strangely (one track at a time in MFM mode, then converts MFM to binary data by using a portion of the graphics hardware to run a miniterm transformation on the buffer; it uses a 4096-bit shift register in the sound chip to slurp up the track in the first place, the major reason why C= sold 1/2-speed high-density drives that work on Amigas going back to 1985 with no hardware modifications). I'll try the Amiga route this week. > Another good trick is to hold the disk between your thumb and first finger, > then whack each edge on the table-top. I've done that. My question is, how does that work? > Also, get out the can of compressed air to clean out each drive before you > try this, and open the shutter on each disk and blow them out, too. I typically blow gently on the open shutter, being *very* careful to keep the airstream dry. I am not blessed with a collection of canned air. Thanks for the tips, -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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FA: heads up; OSI Challenger 1P

by adavie＠mad.scientist.com

This is sort of a heads-up. Even though I am the actual "seller", I'm really putting this item up for a close friend. I'd buy it myself if I could, but I'm in an anti-aquisition mode myself. It's an OSI Challenger 1P computer + documentation http://cgi.ebay.com/aw-cgi/eBayISAPI.dll?ViewItem&item=93182204 There are some nice piccies even if you're not interested in bidding. HI to all :) A

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How scarce (valuable) is core for the PDP-8?

by ethan_dicks＠yahoo.com

When I mentioned the chance to buy a 4kW stack for the PDP-8/i for $100... --- Lawrence LeMay <lemay(a)cs.umn.edu> responded: > Actually, that's probably a reasonable price. Foo! > Core memory boards, probably non-working, have been going for a high price. I got sniped for a PDP-11 double-core stack this weekend, backplane included, that went for $38, no reserve. > Age and a nice visible setup increase the price. The core stack for a PDP-8(i|L) is older than much of what's on the market, but none of the good stuff is visible at all on it. > Now, I havent seen the memory in question. but the pdp8/e core > memory i've seen is all covered by a clear plastic shield. This > increases its value as a display piece, as you can easily see > all the core, and its all protected. It's hard to describe the arrangement, but the core plane in question here is a block with two edge-connectors on either side, "dual-height" as they say, but it's much thicker - let's try bad ASCII art to illustrate... ######## ######## xxxxxxxxxxxxxxxxxx == ######## ######## ######## ######## ######## ######## core planes paddle-boards with wire harness The outside of the core plane part is covered in a "diode matrix", with a wad of twisted-pair wires that go off to paddle-boards, one for the sense bits, one for the inhibit bits. The address lines come up the diode boards, the data comes up and down the paddle-boards. There are several PCBs with core in the core stack, 4-bits per layer with an optional parity layer that has one pad of bits and three pads of core-less X-Y wires. None of this is visible when the plane is assembled, and it's soldered together with lines of wires going up and down the planes. > Of course, in order to use the core on a pdp8/? you would need > a couple of support boards in addition to the core plane board > itself. I would say that just the core plane, being of a nice > size, and being very good 'visually' to display, and somewhat > because its a PDP8 series board (nostalgia value), that its > probably worth $100 all by itself. If it comes with the 2 support > boards and the top connector things at that price, then i'd say > its a bargain. You are thinking of newer hardware. The pre-OMNIBUS 8's have a wad of individual, single-height cards that contain the sense-amps and the inhibit drivers. I have a pile of them from an -8/L that someone else had already begun to strip for parts before I bought it (it also happens to contain the only DEC lock that does *not* use the XX2247 key). I'm not worried about the analog stuff... I need the core. Of course, as Allison pointed out, I could always stick in a lump of battery- backed static RAM. I was contemplating building a wiring harness to adapt an RX8E on the back of either an -8/L (which has 8kW of core out of 12kW in an expansion cabinet) or on the -8/i. I would use berg connector pins to stick the wires on the back side of the backplane (to avoid soldering, of course; but worst case, I just wire-wrap on a connector or two and use sheilded ribbon to move the signals around. The joys of restoration in a market of scarcity. :-P -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

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How scarce (valuable) is core for the PDP-8?

by jlwest＠tseinc.com

In my limited experience with the PDP-8E, memory seems very difficult to come by. I'd give my eye teeth for a 32k semiconductor board, but both semiconductor and core seems to be nowhere. Jay West -----Original Message----- From: Ethan Dicks <ethan_dicks(a)yahoo.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 7:05 AM Subject: How scarce (valuable) is core for the PDP-8? > >I have a chance to buy a 4kW core stack for the PDP-8/i (-8/L). It's >more than I want to pay, $100. My question is, what are these things >going for these days? I don't really *need* it. The guy selling it >has more core than this that he saved from a "recycler", but he's in >it for the money, not out of a love for classic machines. Most of his >memory, he sells to people who want something to stick on the shelf and >"ooh" and "aah" at. :-( > >So... for those people who have been trying to get core over the past year >or two, what's it costing? I'm trying to decide if I want to grab this >stack to put into my -8/i and bring it up to 8kW, an entirely optional >project (I have all the other parts I would need for the upgrade from a >PDP-8/L that I got in 1982 that was sold as parts-only, bad core, and most >of the I/O and part of the CPU missing). > >I think he's charging too much, but maybe I'm disconnected with the >current pricing. I do know that if I pass on it, there are several >other people who are waiting for this exact piece, so it'll be sold >one way or the other when I answer him. > >OTOH, I do have a broken (20-30 fractured cores) -8/L stack that I've >contemplated repairing. It's a parity stack, so I can scavenge wire >and cores from the parity plane (or just use the parity plane intact >as another bit, then use one pad of broken core to repair the other, >less damaged pad of broken core). Any thoughts out there on core repair? >It's 1968 DEC core with, AFAIK a seperate sense and inhibit wire, which >is both good and bad - good because the cores are larger than three-wire >core, bad because I'd have to thread up, down and two diagonals. > >Of course, I could always sell the broken plane to a collector and use >the money to fund part of this working stack. So many options. In terms >of time spent, it's cheaper for me to work a few hours and earn the money >that the core pirate wants; in terms of lessons learned, repairing a 30-year- >old core stack would be a big thrill, *if* it worked. > >Thanks, > >-ethan > > >_________________________________________________________ >Do You Yahoo!? >Get your free @yahoo.com address at http://mail.yahoo.com > >

27 years, 1 month

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Amiga 2000HD Hard disk

by gregorym＠cadvision.com

I'm not sure about the problem you're having with HDToolbox, but what type of HD controller is in your 2000HD? I remember having problems similar to what you're experiencing (old Mac SCSI drive not recognized by OS) when I was using a 2090a in my 2000. When I switched to a 2091, I had no further problems. I think the 2091 was standard in the 2000HD, but it might be worth checking to see if someone has swapped in an old controller... Just a thought. Good luck. Mark. ---------------------------------------------------- Amiga / Apple / NeXT / PDP-11 / PS/2 Computing happily on the trailing edge of technology ---------------------------------------------------- At 07:25 PM 4/17/99 -0400, you wrote: > >Well, I know about HDToolbox, but there's one problem. > >When I try to run HDToolbox, it always says "Driver not installed" in the >box that is supposed to contain drive information. The HDSetup program >will get to the point where it is supposed to start formatting & >partitioning the drive, then just drops back to WorkBench with no >messages. > >Any ideas for this one? > >Thanks, >Kevin >

27 years, 1 month

4
3
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Dumb OS question

by mbg＠world.std.com

>Did something fall into place here for me? >Does the "RT" in RT-11 happen to stand for Real Time? It sure does... Megan Gentry Former RT-11 Developer +--------------------------------+-------------------------------------+ | Megan Gentry, EMT/B, PP-ASEL | Internet (work): gentry!zk3.dec.com | | Unix Support Engineering Group | (home): mbg!world.std.com | | Compaq Computer Corporation | addresses need '@' in place of '!' | | 110 Spitbrook Rd. ZK03-2/T43 | URL: http://world.std.com/~mbg/ | | Nashua, NH 03062 | "pdp-11 programmer - some assembler | | (603) 884 1055 | required." - mbg | +--------------------------------+-------------------------------------+

27 years, 1 month

1
0
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Ancient disk controllers

by edick＠idcomm.com

The mode in which the Shugart SA1400 controllers, after which some of XEBEC's controllers were patterned, was this ultra-simple model. That may not have been the only mode, but I've got an 8" drive controller which seems to work in this way, as it also has no device address switch. I've never found the identifying logo or whatever, but the S-100 adapter I got with this setup has a PROM marked "SA1400." I've also read about this single-target-single initiator mode in the early papers we used in establishing the SCSI-I standard back in the mid-1980's. ( I had the "privilege" of sitting through a number of the standards committee meetings on behalf of my employer back then) Clearly, SOME makers had used this as an operating mode. Multiple disk drives were not that common among small systems back in those days. Dick -----Original Message----- From: Eric Smith <eric(a)brouhaha.com> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Monday, April 19, 1999 12:07 AM Subject: Re: Ancient disk controllers >> SASI, incidentally was essentially a >> Single-Target-Single-Initiator SCSI so it wouldn't need a device ID switch. > >SASI supported eight targets. Since there was only one initiator and no >disconnects, the initiator didn't need an ID. But the target devices still >needed IDs. > >SCSI-1 added arbitration (for multiple initiators), disconnects (and >reselection), and the 10-byte commands (to support larger devices). I'm not >sure whether SASI supported the message phase; that may also be a SCSI-1 >innovation. > >Usually a SASI host can deal with SCSI disk drives. Sometimes a SCSI >host can deal with SASI targets, as long as it restricts itself to the >SASI commands.

27 years, 1 month

1
0
0 0

Dumb OS question

by allisonp＠world.std.com

<My dumb question: What is a real time operating system? < <Hans Olminkhof Complex question simplified answer. An Operating system (environment) that supports tasks that must keep up with real world events. Timeliness is the key element, either now or within a known time for actions to occur are often part of the specification typical use might be process control where pressure, temperature and ??? are monitored and adjsted to stay withing bounds or require extremely fast reaction to abrupt changes. Things that RTOSs have are interrupt driven events and scheduling of lower priority events for less demanding tasks. RTS-8 (DEC pdp-8) (sources and docs on the 'net) RT-11 (dec PDP-11) Two commercial examples that are well known. CP/M and believe it or not DOS (there are DOS look alikes that are RT) can be as well. Allison

27 years, 1 month

4
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Ancient disk controllers

by ethan_dicks＠yahoo.com

--- Pete Turnbull <pete(a)dunnington.u-net.com> wrote: > On Apr 19, 5:58, Eric Smith wrote: > > > Usually a SASI host can deal with SCSI disk drives. Sometimes a SCSI > > host can deal with SASI targets, as long as it restricts itself to the > > SASI commands. > > Some old SCSI hosts can, but most modern ones expect to use messages. I have an ancient driver for monochrome Macs that can be set to old SCSI<->ST-506 bridges like the Adaptec 4000-series or even a couple of SASI controllers. I know I've seen one SASI<->ST-506 bridge - inside the Commodore PET D9060/D9090 hard drives. There's a Tandon TM602S (or TM603S) inside the box, a SASI interface to it, then a Commodore "DOS" board that speaks SASI out one end, IEEE-488 out the other. One of these days, I'll disassemble the ROMs on the D9060 and look for the part that reads the 5Mb/7.5Mb jumper and sets up the drive parameters, then patch in the right numbers for an ST-225 so I can continue to use the thing after my last 5Mb mechanism dies. -ethan _________________________________________________________ Do You Yahoo!? Get your free @yahoo.com address at http://mail.yahoo.com

27 years, 1 month

1
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All this OT stuff...

by JRichardson＠softwright.co.uk

>> I've installed a filter at my end that should dump most, if not all, >> messages with OT: in the subject line. However, the point remains that I >> should not have had to do so in the first place. Hmm, the problem with that being that occasionally OT conversations are interesting/meaningful.... what we need is a filter that only starts dumping OT threads after the first few messages (enough intelligence to never let *any* 'my language is better than yours', gun laws, ABS braking etc etc. conversations through would be great too.... :*) (Hmm, maybe that sounds a bit heavier than it should be... still, it is Monday morning... ;) cheers Jules >

27 years, 1 month

1
0
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Ancient disk controllers

by pete＠dunnington.u-net.com

On Apr 19, 5:58, Eric Smith wrote: > SCSI-1 added arbitration (for multiple initiators), disconnects (and > reselection), and the 10-byte commands (to support larger devices). I'm not > sure whether SASI supported the message phase; that may also be a SCSI-1 > innovation. It didn't; messages first appeared in SCSI-1. > Usually a SASI host can deal with SCSI disk drives. Sometimes a SCSI > host can deal with SASI targets, as long as it restricts itself to the > SASI commands. Some old SCSI hosts can, but most modern ones expect to use messages. -- Pete Peter Turnbull Dept. of Computer Science University of York

27 years, 1 month

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The Paxton auction: the aftermath

by jimw＠agora.rdrop.com

For those who have never witnessed the diversity and chaos that has been Paxton's warehouse, pictures taken today during the auction are available at: http://www.computergarage.org/Garage/Paxton/P0??.JPG (where ?? = 06 thru 42) The last few are shots of the collective bootie that the local gang took out. (and yes, its as chaotic as it looks in the pictures!) I'll probably arrange it into a more normal web page in the next few days. For my part, I managed to nab a pair of HP 1000F minicomputers (CPU cabinets only), a Tek 4006 terminal, a DEC TU-81+ tape drive and RA-81 hard drive, a Freiden computerized postage scale, a case of toner kits for DEC LN-03/Scriptwriter printers, a Tektronix Type 230 'Digital Unit', an HP-9000 computer, a DEC MINC-11, and some other assorted goodies. 20 points extra if you can tell us why the unit in this picture: http://www.computergarage.org/Garage/Paxton/P049.JPG had enough significance to rank fairly high on my 'nab' list... More to come... -jim --- jimw(a)computergarage.org The Computer Garage - http://www.computergarage.org Computer Garage Fax - (503) 646-0174

27 years, 1 month

7
13
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Dumb OS question

by jolminkh＠nsw.bigpond.net.au

Tim Shoppa wrote: >Some real-time operating systems can be pressed into service as >general-purpose multi-user OS's. For example, RSX-11M. Others >make quite nice single-user development platforms - for example RT-11. > Did something fall into place here for me? Does the "RT" in RT-11 happen to stand for Real Time? Hans Olminkhof

27 years, 1 month

1
0
0 0

z80 timing... 6502 timing

by edick＠idcomm.com

See my one comment embedded below, plz. Dick -----Original Message----- From: Tony Duell <ard(a)p850ug1.demon.co.uk> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 2:08 PM Subject: Re: z80 timing... 6502 timing >> >> I want to distance myself from the majority of this nonsense. Building a >> simple computer with a processor, a ROM, a full compliment of RAM, and a >> serial console interface is a 10-minute design and a 90-minute fabrication > >Less than that, actually. There's nothing to 'design' IMHO - just stick >the chips on a piece of wire-wrap board and wire-wrap the address and >data buses. While you're doing that, design the address decoder with the >other half of your brain. > >I built a 6809 SBC years ago, and the chip count was pretty minimal. >IIRC: >6809 CPU + 4MHz crystal as the clock >2 off 6264 RAMs (16K RAM total) >2764 EPROM and space for a second one >6551 + MAX232 serial port >9914+75160+75162 GPIB port (that was in the spec, obviously not needed >for a general-purpose machine). >2 off 74LS138 address decoders (one to divide the memory map up into 8K >blocks, the other to subdivide one block for the I/O chips). These days >I'd use a GAL. >A couple of TTL latches and buffers for I/O ports (cofig switches, status >LEDs, etc). > >That was it. Obviously a 6502 could be used with much the same hardware. >A Z80 wouldn't be any worse either. Rockwell made a 65C102 available in the same speed grades as the 65C02. This used a quadrature clock just like the 6809 and worked pretty much like it as well, at least insofar as the timing circuit was concerned. >> Now I can't imagine why a graphics display, or anything so inane as that >> could creep into the consciousness of an otherwise perfectly sane person >> wishing to deal with one of life's fundamental mysteries, i.e. "which is >> really faster, the XXXX or the YYYY?" > >Oh, Sam was suggesting all sorts of complex features and I was pointing >out that most of them weren't that hard to add if you really wanted them. >You don't want them for this challenge IMHO. > >-tony >

27 years, 1 month

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z80 timing... 6502 timing

by edick＠idcomm.com

That's what y ou have to do when you start with nothing. It's not a new concept. Dick -----Original Message----- From: Mike Ford <mikeford(a)netwiz.net> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 2:10 PM Subject: Re: z80 timing... 6502 timing >>Sure! Let's have a driving contest to see who can drive the fastest, but >>first we all have to build our own cars. THAT MAKES AN AMAZING AMOUNT OF >>SENSE! > >Shsssh! We're building a race track first. > >

27 years, 1 month

1
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z80 timing... 6502 timing

by edick＠idcomm.com

please see the embedded comments below. Dick -----Original Message----- From: Tony Duell <ard(a)p850ug1.demon.co.uk> To: Discussion re-collecting of classic computers <classiccmp(a)u.washington.edu> Date: Sunday, April 18, 1999 2:05 PM Subject: Re: z80 timing... 6502 timing >> >> If one were going to put an FDC in place, the easiest probably would be the >> WD3765, since it has built in cable-drivers and receivers as well as > >Sure. Or one of the similar, but incompatibly pinned-out UMC disk >controller chips. > >Heck, it wouldn't be hard to add one of the multi-I/O chips from a PC I/O >card and have FDC, 2 serial ports and a printer port. Most of them only >need an 8-bit data bus for those functions. > >> clock/data processing hardware. You connect it directly to the cable, as I >> recall. It otherwise behaves as a uPD765 (i8272). > >Absolutely. The point I was making (not very clearly) is that WD FDC >chips are getting hard to find, but there's no reason not to use an 8272 >(or one of the later chips based on this, but with more things integrated >into the device). > >But if you insist on 'classic' hardware (meaning all the chips you use >were in production at least 10 years ago), you probably won't be allowed >to use some of these more integrated devices. That's exactly the reason I'd prefer to use the WD1002 boards I have around. They handle both the FDC and HDC functions with a minimum of extraneous hardware and would, at least in the case of the Z-80 lead to a productive OS. That's not as likely in the case of the 6502, since there wasn't much of use around for it. Nonetheless, a nonvolatile storage medium of some sort would be convenient, and if I make the board in question home to both processors there'll be no doubt about whether one or the other has more or better resources. I got these boards in 1982. When they were brand new products and, in the case of the 1002's, before they were released commecially. >-tony

27 years, 1 month

1
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The Paxton auction: the puzzle

by jimw＠agora.rdrop.com

At 09:18 PM 4/18/99 -0700, you wrote: > >In case anyone's wondering what everything is in the pictures Mr. Willing >took at Paxton's auction, I've identified as many things as I can so that >if anyone ever spots one of these in their travels and wonders if its >worth their while to pick up, they'll at least have an idea what they're >looking at. <snippage> > P023.JPG 17-Apr-1999 22:02 64k > >Damn it! Damn it all to hell! That's the HP 9000/520 Unix workstation >I've been lusting for!! Frank McConnell has the only one I've ever seen. Well then, you're gonna hate me! It followed me home! (or at least, will as soon as I get back to pick it up!) > P024.JPG 17-Apr-1999 22:02 73k > >Tektronix 4001 (or 4002?) storage scope. Well... I thot it was a 4002 as well... It is a 4006-1. It followed me home too! > P044.JPG 17-Apr-1999 22:03 79k > >Is this the HP1000F? I thought you said it was an empty chassis. No, I said I got the CPUs only (as opposed to a complete system). P044.JPG is the rear of the unit, P045.JPG is the front. B^} -jim --- jimw(a)computergarage.org The Computer Garage - http://www.computergarage.org Computer Garage Fax - (503) 646-0174

27 years, 1 month

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