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101090 discussions

PDP-11/20 vd one that just says pdp 11 what are the date differences?? OEM?

by COURYHOUSE＠aol.com

Ok then it definitely defines the date then of a unit. eons ago when I first had started compute exchange in Phx we had one that just said pdp -11 as I remember it came from Sandia Labs. Currently we have a 11/20 Ed# smecc.org In a message dated 2/22/2016 1:12:16 A.M. US Mountain Standard Time, pontus at Update.UU.SE writes: The PDP-11/20 was the first PDP-11. I believe the number was added when the other models came out, to discern them. /P On Mon, Feb 22, 2016 at 03:03:17AM -0500, COURYHOUSE at aol.com wrote: > PDP-11/20 vd one that just says pdp 11 what are the date differences?? > OEM? was one version for customer and one for OEM? > THANKS IN ADVANCE > > Ed# > >

10 years, 2 months

Looking to buy a Tektronix 405x computer.

by ian.finder＠gmail.com

I've been looking for one of these for ages- I have a lead on a TeK storage tube terminal and will make a trip for it as soon as I can, but I'd love to find one of the computers. I'll pay for one in any condition and shipping from anywhere I can find one. Does anyone have a lead? Please let me know... Thanks, - Ian -- Ian Finder (206) 395-MIPS ian.finder at gmail.com

10 years, 2 months

Schematic for PA68-F (High speed paper taper reader/punch for PDP-8)

by cramcram＠gmail.com

Hi, I'm looking for the schematic for a PA68-F. It's a two high collection of single width M series modules that implements the paper tape high speed reader/punch control for positive bus machines. I found a Typeset 8 document that describes the maintenance for the beast but not the schematics which are apparently in Dec document A-ML-PA68-F. Does anyone out there know where I can download this document? Thanks, Marc

10 years, 2 months

Any PDP-7 Expertise?

by wkt＠tuhs.org

Hi all. Some of you may know me as the guy who set up the Unix Heritage Society at www.tuhs.org. We've been able to restore some of the old Unix systems to working order, including a PDP-11/20 version from 1972. I've just been given a scan of the assembly listing for PDP-7 Unix which includes the kernel and some user-mode programs. The scans are at http://www.tuhs.org/Archive/PDP-11/Distributions/research/McIlroy_v0/ as the files 0*.pdf. I have this crazy idea that this system could be resurrected to working order on SimH and/or on a real PDP-7. But I'd a) need to learn the PDP-7 architecture, b) write an assembler, c) OCR the scan (manually) and d) spend a lot of time debugging something that has no user manual and may not even work! I thought I'd ask here if there is any PDP-7 expertise that I could lean on if I decided to actually proceed. Many thanks in advance for pointers, suggestions, help. Warren P.S I've already found http://www.soemtron.org/pdp7.html the PDP-7 Reference Manual f75ppdp7prelimumdec64.pdf and http://bitsavers.trailing-edge.com/pdf/dec/pdp7/`

10 years, 2 months

VCF East ** AND WEST ** ticketing is online

by cctalk＠snarc.net

Tickets for VCF East and VCF West are available online. West: http://vcfed.org/wp/festivals/vintage-computer-festival-west-xi/vcf-west-ti… East: http://vcfed.org/wp/festivals/vintage-computer-festival-east/tickets/ IMPORTANT: - Exhibitors don't need tickets for Saturday/Sunday (exhibit registration will open soon) - East only: Friday teachers don't need tickets for that day - Bring your kids! Free admission for 17 and younger

10 years, 2 months

H11 Success with XXDP

by rich.cini＠verizon.net

All ? I had some time today to work on the second serial port for the H11 I received two weeks ago. I built the second cable for use with the TU58 emulator so I could load tapes into the machine. I loaded up the bootstrap using PDP11GUI, mounted the XXDPD2D tape and hit ?001000G? and it worked! Yea! Next up, locating other bootable TU58 tapes and seeing if those work. Rich -- Rich Cini Collector of Classic Computers Build Master and lead engineer, Altair32 Emulator http://www.classiccmp.org/cini http://www.classiccmp.org/altair32

10 years, 2 months

Internal HP docs on 9845 sys?

by fulivi＠tiscali.it

Hi everyone, I've been working for the last few months on implementing the MAME emulator of HP 9845B system. In case you're interested, have a look at MAME development page at https://github.com/mamedev/mame. My emulator mostly works, the main missing thing now is the graphic mode and the ability to load optional ROMs. Anyway, I'm posting here because I'd like to ask you a few questions on HP docs. The last thing I worked on for this emulator is the "TACO" tape driver. I reverse engineered it entirely from sw & the (scarce) docs available enough that it works. So here a few questions for you: * Back in the days, what was the HP approach to document internally-developped chips for its own sw developers? I mean, was there a kind of programmers' guide for TACO chip? Is there any hope someone scanned it and made it available somewhere? I know that for hybrid processors HP made an internal manual titled something like "how they do dat" manual... * Just out of curiosity, what a big company like HP does with its "historical" documents? Do they have an archive where they keep documents & sw from, say, the 70s? Or do they throw everything away when there is some kind of company "shake-up" such as big layoff phases, closing of a site, merging and splitting of divisions? Thank you. -- F.Ulivi

10 years, 2 months

Another MEM11 update

by ggs＠shiresoft.com

Just to let everyone know, I'm making pretty good progress. I just hit "code complete" on the FPGA. That means I've written all of the Verilog code for the FPGA that is the heart of the MEM11. This includes *all* of the Unibus functionality. It all synthesizes for the FPGA and the remaining warnings are all "understood" and best of all it *fits* in my chosen FPGA. Interrupts were fun because I had to figure out how to propagate the bus grants from one (internal) device to the next since their ordering isn't fixed (you can re-arrange the order of the interrupting devices...ie change their slot order). In addition, the interrupting devices aren't fixed to specific request priority...so it ended up being a bit more complicated than I had originally envisioned but once I sat down and thought about it and started writing the code, it wasn't all that hard (just a lot of code). DMA was just a pain but one good side effect is that I created a 1KW(*) FIFO for DMA transactions and the DMA state machine will run as long as there is data in the FIFO. This means that the J1 only has to deal with DMA at the start, end or when the FIFO needs refilling rather than on every word. The DMA also has a programmable "delay" so that it won't swamp the Unibus and starve the PDP-11 CPU. For the RF11 (the only DMA device on the MEM11) this will typically be set to the original transaction speed of the RF11 disks (for 60Hz machines that would be a word every 16us or 19.2us for 50Hz machines). There are configuration settings in the RF11 emulation that specify the rotational speed of the RF11 disks as well as the DMA transfer delay. I'm now off to start writing a bunch of test cases for the various blocks so that I can start to simulate the design. Once I'm happy with the simulation results, I'll start to create the schematic for the MEM11. Because I'm so tight on pins (I'm using 129 out of the 158 I/O pins), I'm having to use some of the "multi-function" pins. The main implication is that I might need to use a small CPLD so that I can switch between the different functions. The main set of multi-function pins that I have to use are the ones used by the FPGA to load it's bit-stream on power on reset. This is an understood problem and isn't something that I have to worry about now. The only impact will be in re-assigning pins so that low speed I/Os (LEDs, and sense jumpers) are only shared with those pins. I'll post another status update once I've made some significant progress on the simulation and testing. TTFN - Guy (*) The reason that I chose a 1KW FIFO rather than something smaller is that the "block RAM" in the FPGA comes in 18Kbit "chunks". So the easiest course was to use one of them configured as 1K x 16 (I'm ignoring the 2 "parity" bits in the "block RAM") as the memory for the FIFO. Since I'm using less than half of the "block RAMs" (all of the other used "block RAMs" are used for the RAM for the J1) I can make the FIFO substantially larger if I need to.

10 years, 2 months

Then & Now

by c.murray.mccullough＠gmail.com

The microcomputer market back when classic computers were the in-thing saw $1000 machines ; software costing $10s or $100s. Today hardware-wise $500 buys a powerful machine while many apps/programs are free or cost in the low $10s. Todays machine are 1000x maybe a million times faster. Interesting history for machines we love! Happy computing. Murray :)

10 years, 2 months

Panda Display USB prototype boards are in

by dave＠661.org

I just received three prototype Panda Display USB boards from Oshpark. Now to finish the emulator side of the project and I'll have more to offer up for sale. One or two of these prototypes might be available now if you can make a good case for it (ie, you feel comfortable hacking klh10 to get it working with the board). https://www.flickr.com/photos/32548582 at N02/24861506310/in/dateposted-public/ -- David Griffith dave at 661.org A: Because it fouls the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing in e-mail?

10 years, 2 months

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