> #30 "PMI on KDJ11-B and MSV11-J"
So it turns out there are _two_ uNote sets, with overlapping numbers! (A fact
about which I was previously unaware!)
I have two PDF files of the collections; micronoteReprints.pdf (the first
set), and oemMicronotes.pdf (the second).
Note! There's an index to the first set at the back of the second, and it
lists 111; but the ToC for the first one only lists 85! But they are in fact
all there (and more; the ones there go up through 115).
Noel
> From: Charles Dickman
> an 11/84 with the UNIBUS adapter and PMI memory does not have a Qbus.
> ... the KDJ11-B (M8190) bus protocols change when a KTJ11 (UNIBUS
> adapter) is present and so what would be expected to be Qbus isn't.
Ah, excellent point.
Looking at the description of the CPU/UBA adapter in the KDJ11-B User Manual
(EK-KDJ1B-UG-001, pp. 7-6 to 7-9), the answer is not certain; it all depends
on implementation details on the CPU card which aren't described.
E.g. the DMA cycle _might_ work, it all depends on what happens at step 8
when, instead of PBSY being asserted, BSYNC is asserted. The _memory_ will be
fine (since in an -11/83, this kind of thing is expected)... but the _CPU_,
who knows.
Interrupt cycles are more problematic; the assertion of the interrupt level
on the BDAL lines (step 1a) will probably pass, but step 6 (assertion of
BSACK) may be an issue, since the device will want to assert BRPLY instead
(BSACK is not used in a QBUS interrupt), and the CPU may not do the right
thing.
> I think there was a DEC Micronote that explained the protocol
> modifications involved.
I don't think so; #30 "PMI on KDJ11-B and MSV11-J" describes the _basic_
PMI, but the interaction with the UBA isn't described there. But the
KDJ11-B User Manual has it in some detail.
Noel
hi
I am looking for a ps/2 keyboard with a 3 buttons trackball
I am currently using a Cherry's kb, but it has a built-in 2 buttons
trackball and the software I need to use requires the third button to
select items
what do you suggest, guys?
So what does it take to get OS/9 running on a Radio Shack Color Computer?
I have a Color Computer 2 (? 64k and non-chicklet keyboard) and have
always wanted to get it working with a disk OS. What do I need? I see
a reproduction floppy disk controller on ebay. I would rather skip
that and go straight to some kind of sold state memory.
Suggestions or pointer to active groups?
On Sun, Jul 22, 2018 at 5:31 PM, W2HX via cctalk <cctalk at classiccmp.org> wrote:
> Not mine, just thought it might interest some here
> https://www.ebay.com/itm/202376723756
-chuck
> We're actually pretty well off, there; we have:
> - MS11 Maintenance Manual (DEC-11-HMSAA-D-D)
> - MS11 MOS Memory Troubleshooting Guide (DEC-11-HMSTS-A-D)
> - MS11-B Engineering Drawings
There's also a little bit about the MS11-C (not covered in the documents
above) in EK-11045-MM-007.
There is a later rev of the MS11 manuals, which does cover the MS11-C; Chuck
McManis had both of them:
EK-MS11A-MM-006 MS11-A,B,C memory systems maintenance manual
EK-MS11A-OP-001 MS11-A,B,C memory systems users's manual
but when I contacted him about them a while back, he wasn't sure if he still
had them, or if he'd given them to Al K to scan and put up (he was on the road
at the time, so couldn't check if he still had them).
Al, are they in your queue somewhere? (No rush to do them, if so; I just want
to make sure we know where they are.)
> If the board is a cache, how does it get filled? It would have to listen
> to the UNIBUS the memory is on. ... Note that there has to be a signal
> from FastBus ... which tells the CPU if the MS11 has a given address or
> not ... so the cache board could use that line to tell the CPU whether
> or not the location in question is in the cache.
Studying the MS11 Maint Manual, the MS11 controller has access to the full
address and data from both the CPU (FastBus) and UNIBUS B. (The FastBus
actually has two uni-directional data busses; in and out.) So all that info,
this hypothetical cache board can get from the slot it is plugged into
(assuming the cache is plugged into one of the controller slots), over its
connector pins.
The connectors on the back of the card, and two small boards, must be for
listening to UNIBUS A (in configurations in which the two UNIBI aren't joined
together)? (I'm too lazy to check the slot numbers are see what they actually
are.)
And there is indeed a signal which the MS11 uses to tell the CPU it has the
location the CPU is asking for, so it's theoretically possible to build a cache
card that plugs into a FastBus slot.
Noel
The PDP-11/84 uses the M8190 CPU that is also used in a PDP-11/83. The 11/83 and 11/84 use PMI
Memory but the 11/83 also can use Q22 memory. With the 11/83 the position of the memory board (assuming
one is using the MSV11-JD or JE) above the CPU uses PMI and below the CPU in the backplane uses
Q22. In the 11/84 the CPU is above the MSV11-JE memory but the CPU only uses PMI to talk to memory.
diagrams in the Unibus processor handbook indicate that the M8191 Unibus map board only communicates
through the PMI bus to both memory and to the CPU.
Now my question is, there are 3 Bus slots in the 11/84 above the Unibus map board, would it be possible
to put a dual width Q22 I/O board in the second memory slot (not the PMI side of the slot) and have it
able to DMA into the MSV11-JE?
If so then something like an Emulex UC07 and a SCSI2SD card could make a cost effective disk solution,
since Unibus SCSI controllers are so expensive.
Mark
Good arvo all;
A family member recently purchased a rather large CNC which uses a
Micon16-II system (as well as a Fanuc 15M) to drive it. Unfortunately the
battery for the RAM died during storage prior to him getting it and all of
the ladder logic is gone.
We'd really love to try and find some kind of technical manual for the
16-II, or anything really, to assist in talking with the machine and
interrogating it's state. We have a copy of the missing ladder logic in
paper form so we're not totally out of luck, but the ability to enter it
in segments rather in one 40 hour slog might be nice.
If anyone has anything easily sharable we'd very much appreciate the
assistance;
Thank you.
- JP
Anyone got pinout/spec information for a MOS MCS2529? In particular, I'm
curious about operating voltage. I acquired a Melcor SC-635 calculator
yesterday and there seems to be some uncertainty about the output voltage
of its (rechargeable) battery pack; some places say 2.4V, i.e. the pack is
a pair of 1.2V cells, but others say 9V.
2.4V seems a little low to me for typical logic, but on the other hand I've
seen a period ad which says that the external PSU was 9V - and so the
rechargeable battery must have been somewhat less than that.
cheers
Jules
> From: Mark Matlock
> With the 11/83 the position of the memory board ... above the CPU uses
> PMI
Yes, through the C-D interconnect; described in detail here:
http://gunkies.org/wiki/CD_interconnect#Use_by_PMI
The 'above' is because the CD interconnect is not a true bus, it only
interconnected pairs of slots.
> In the 11/84 the CPU is above the MSV11-JE memory
The PMI is still on the CD connector in this machine, but the PMI is wired as
a true bus on the backplane, allowing that ordering.
> there are 3 Bus slots in the 11/84 above the Unibus map board, would it
> be possible to put a dual width Q22 I/O board in the second memory slot
> (not the PMI side of the slot) and have it able to DMA into the
> MSV11-JE?
It is speculated that this should be possible, but there are jumpers on the
backplane you'd need to pull. See the writeup here:
http://gunkies.org/wiki/PDP-11/84#QBUS_slots
Noel
