test-drb

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101090 discussions

by jwest＠classiccmp.org

List - sorry for the noise.. Paul - sent you a couple emails on the 2100 front, wasn't sure if you got them (re: WCS boards). J

10 years, 11 months

Fast Company talks about Vector Graphic Inc

by christian_liendo＠yahoo.com

http://www.fastcompany.com/3047428/how-two-bored-1970s-housewives-helped-cr…

10 years, 11 months

Chromatics on ebay

by billdegnan＠gmail.com

I told the person that they will get more $$ if they prepare in advance to ship, etc. People don't care and /or are lazy sometimes. b On Thu, Jul 23, 2015 at 11:21 AM, Bill Sudbrink <wh.sudbrink at verizon.net> wrote: >> I spoke with the person, told him it was historic, looked up some info >> on the machine and when it was produced, etc. VERY surprised it sold >> for $5. Total bargain. > > That's what "local pickup only" will do to an auction. > There's a Vector MZ for 99 cents right now for the same reason. > > Bill S. > > -- Bill vintagecomputer.net

10 years, 11 months

EPROM image for Xylogics 472 (multibus Pertec controller)?

by earl＠baugh.org

> > On Dec 17, 2014, at 7:35 AM, Al Kossow wrote: > > > I should have one, somewhere.. Bear or Earl probably have one as well. > > Apparently I don't have an XY472, or at least one doesn't show in > inventory. I was totally ready to jump in and save the day, too! > > ok > bear. I'll try to check tonight when I get home... spreadsheet says I have 8 Xylogics SMD controllers... have to see if any is an XY472. Earl the Squirrel

10 years, 11 months

Offered: Amiga 500/2000 BASIC manual, in German

by lproven＠gmail.com

In honour of the 30th anniversary. Anyone want this handbuch? In good condition, some staining on front cover but no dog-ears or creases. Free for the cost of postage from the Czech Republic. -- Liam Proven ? Profile: http://lproven.livejournal.com/profile Email: lproven at cix.co.uk ? GMail/G+/Twitter/Flickr/Facebook: lproven MSN: lproven at hotmail.com ? Skype/AIM/Yahoo/LinkedIn: liamproven Cell/Mobiles: +44 7939-087884 (UK) ? +420 702 829 053 (?R)

10 years, 11 months

Looking for AM2900 evaluation and learning kit

by sq6fmy＠gmail.com

Hi, Maybe somebody on the list have such a board in collection and want to sell it. It looks like this: http://ferretronix.com/march/sbc/amd2900/2900_trainer_80.jpg Cheers, Jacek

10 years, 11 months

PDP 11 gear finally moved

by jnc＠mercury.lcs.mit.edu

> From: Tothwolf > How do you know those aluminum electrolytic capacitors are functioning > just as good as they did when they were new? Unless you've tested them > out of circuit ... > ... aluminum electrolytic capacitors by their very electrochemical > nature degrade as they age and as they are used. I am way out of my knowledge range in this discussion, but here's something I wanted to ask about: how do you reconcile this observation (assertion?) with the observations from several people (e.g. the PDP-1 people) that they _have_ measured the electrolytics in their power supplies, and despite being N decades old (where N ~= 5), they are _still_ within specs? If the very nature of electrolytics mandates that they degrade, how are these still meeting specs? I'm very confused... Noel

10 years, 11 months

NCR83C11 Datasheet

by chd＠chdickman.com

Anyone have a datasheet for the NCR83C11? I believe it is a SCSI transceiver.

10 years, 11 months

Dumping Intel 43201 microcode ROM

by spacewar＠gmail.com

Previously I posted photos of a Zilog Z8-02 MPD running a copy of the Z8671 BASIC subset ROM code on a breadboard. The Z8-02 was packaged in a ceramic leadless QUIP package, and I have only one good QUIP socket, so I made an adapter that the QUIP socket can plug into, which then has a very wide 64-DIP footprint for ease of prototyping. The bottom of the adapter has footprints for surface-mount decopling capacitors very close to all of the QUIP socket pins; the SMT capacitors are installed depending on the specifc chip for which the adapter is configured. Although the Z8-02 is totally unrelated to the Intel iAPX 432, this served as validation that I can make a usable QUIP socket adapter. The iAPX 432 General Data Processor consists of two chips, the 43201 instruction unit and the 43202 execution unit, both packaged in the ceramic leadless QUIP. Since I only have one QUIP socket, I plan to make sockets using pogo pins and a machined or 3d-printed frame. For now, I have just wired up the 43201 on a breadboard in microcode ROM dump mode, and captured the ROM contents using a logic analyzer. Photos: https://www.flickr.com/photos/22368471 at N04/sets/72157653865063443 The 43201 has 4K words of 16 bits of vertical microcode ROM, however the top-level control is not done by the microcode ROM, but rather by a bunch of PLAs and hardwired logic. Many of the simpler 432 instructions are executed without use of the microcode ROM at all. Microcode routines are invoked in response to specific conditions or more complex instructions, and the routine entry addresses come from those PLAs, so it is fairly difficult to interpret the contents of the microcode ROM. While I can identify many of the entry points, I only have been able to determine what a few of them actually do, such as a few of the floating point instructions, and one of the simplest object instructions. However, eventually I hope that study of the ROM dump will shed some light on a few dark corners of the architecture left unspecified by the otherwise fairly comprehensive iAPX 432 General Data Processor Architecture Reference Manual. I have a design in progress for an iAPX 432 test system using a MicroZed board. This is based on the Xilinx Zynq, which has ARM Cortex-A9 processor hard cores as well as a substantial amount of FPGA fabric. The MicroZed will plug into my board, which will have level-shifters and such, as well as the QUIP sockets for the 43201 and 43202. The FPGA will be programmed to act as a memory controller for the 432 packet bus, as well as a logic analyzer for both that bus and the interchip bus used for microinstructions and status. There is not known to be any surviving coherent release of iAPX 432 software, so I'm developing my own software from scratch. It is a large task, because the iAPX 432 architecture is completely object-oriented (implemented by the microcode and hardware), and there have to be several dozen properly formed system objects in memory just to execute the simplest program. I expect that my first attempts to get the iAPX 432 to execute a code image I have generated will result in failure. The 432 architecture provides for a lot of software fault recovery, but if the system objects are not properly set up for the fault condition, it will assert the FATAL pin and halt. (This is the same concept as a double bus fault on more conventional processors.) By studying the bus activity leading up to the halt, I hope to be able to determine what problem with the memory image led to the halt.

10 years, 11 months

MEM11 Update

by jnc＠mercury.lcs.mit.edu

> From: Guy Sotomayor > I haven't looked, but I think the Unibus and QBus are comparable in > terms of pin count. Well... the QBUS does have those shared address/data lines, so its 'raw' count (i.e. number of wired-or broadcast bus lines) is somewhat lower (-16 data pins, but +4 address lines, plus various other differences). Depending on the details that may, or may not, translate into a lower pin count to the FPGA. E.g. if one has separate input and output pins for address/data lines (one needs all 4 functions for doing both incoming slave mode, and DMA), it can add up. So, I noticed that on some QBUS cards DEC used a quad transceiver with tri-state output (on the card side), the AM2908PC. It has separate tri-state drive enable, and bus drive enable, pins. The FPGA we were looking at supports bi-directional pins (i.e. tri-state output, plus input), so I conceived the hack of tying the transceiver's input and output pins together, and routing them into bi-directional pins on the FPGA. As long as one doesn't turn on the tri-state drive and the QBUS drive enable at the same time (forming a feedback loop at the transceiver chip), it _should_ work OK. (Mandatory observation about theory and practise included at this point...) So that reduces the number of pins needed by half. (Although I guess one could pull the same hack with the UNIBUS, _iff_ the 2908 can work as a UNIBUS transceiver; analog electrically, the two seem to be pretty identical.) One can further observe that on the QBUS, A and D are shared, so one doesn't need separate A and D pins. One cannot do that with the UNIBUS, since they way DATO works, the A and D lines have to be driven at the same time (with different values, of course). Noel

10 years, 11 months

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