> Even better, it claims to be able to control whether the memory uses odd
> or even parity! (How, for UNIBUS memory, I don't know - there's no way to do
> this over the UNIBUS.
So this really confused me, as the UNIBUS spec says parity is wholly within
the slave device, and only an _error_ signal is transferred over the
bus. E.g. from the 'pdp11 peripherals handbook', 1975 edition (pg. 5-8): "PA
and PB are generated by a slave ... [it] negates PA and asserts PB to indicate
a parity error ... both negated indicates no parity error. [other
combinations] are conditions reserved for future use."
The answer is that originally the UNIBUS parity operation was _different_, and
that sometime around the introduction of the PDP-11/45, they _changed_ it, which
is apparently why Appendix E, about parity in the /45, says what it does!
I found the first clue in the MM11-F Core Memory Manual (DEC-11-HMFA-D - which
is not online, in fact no MM11-F stuff is online, I'll have to scan it all and
send it to Al); I was looking in that to see if the parity version had a CSR
or not (to reply to Paul Koning), and on the subject of parity it said this:
"The data bits on the bus are called BUS DPB0 and BUS DPB1." And there is
nothing else on how the two parity bits are _used_ - the clear implication is
that the memory just _stores_ them, and hands them to someone else (the
master) over the bus, for actual use.
Looking further, I found proof in the "unibus interface manual" - and
moreover, the details differ between the first (DEC-11-HIAA-D) and second
(DEC-11-HIAB-D) editions (both of which differ from the above)!
In the first, Table 2-1 has these entries for PA and PB: "Parity Available -
PA ... Indicates paritied data" and "Parity Bit - PB ... Transmits parity
bit"; at the bottom of page 2-4 we find "PA indicates that the data being
transferred is to use parity, and PB transmits the parity bit. Neither line
is used by the KA11 processor."
(Which explains why, when, after reading about parity in the MM11-F manual,
I went looking for parity stuff in the KA11 which would use it, I couldn't
find it!)
In the second, Table 2-1 has these entries for PA and PB: "Parity Bit Low - PA
... Transmits parity bit, low byte" and "Parity Bit High - PB ... Transmits
parity bit, high byte"; at the top of page 2-5 we find wholly different text
>from the above, including "These lines are used by the MP11 Parity Option in
conjunction with parity memories such as the MM11-FP."
I looked online for more about the MP11, but could find nothing. I wonder if
any were made?
This later version seems to agree with that Appendix E. I tried to find an
early -11/45 system manual, to see if it originally shipped with MM11-F's,
but couldn't locate one - does anyone have one? The ones online (e.g.
EK-1145-OP-001) are much later.
It's also interesting to speculate about _why_ these changes were made; I can
think of several! :-)
Noel
I have these two in unused condition (the paper inside is a little yellowed
but apart from that looks new) including cassettes.
Cat no: 26-3839 & 26-3823
Ten pound including postage as paypal gift - not asking a lot as I'd rather
someone had them and saved them from the tip.
Regards, Mark.
Looking to track down an old HP 1000 series A900, A700, A600, A400
board. Its a 12042B Serial Interface board aka 5061-4941 or 5061-4919.
If anyone has one that they want to part with, feel free to contact me.
Thanks
Jesse Dougherty
Cypress Technology, Inc.
Re-Sellers of HP hardware
jesse (at) Cypress-tech.com
Bummer time.... I turned on my VXT2000+ today and after about
5 minutes there was a "pop" and a small puff of smoke from
the power supply. No smell like you get from a selenium diode
or other semiconductor. Now, the fan tries to run but only
twitches and the led blinks slowly. No obvious blown part
visible. Does anyone have a service manual for the H7109-B
Power Supply? I would really like to fix this but I can't
see paying $150-$250 for a replacement. (Actually, if I had
that kind of money I would, but I don't!)
bill
> I'm trying to find a way to get my DEC Rainbow's monochrome output onto a
> newer monitor than my aging VR201 (especially since I zapped something in
> it and my diagnostic efforts to date haven't fixed it).
I can't remember the video output on the Rainbow, but I wanted to do
something similar to have one setup for the S-100 machines. After
looking on eBay (before I banned them from my use), I found a device
that basically had RCA audio/video inputs with a VGA output. It also had
the advantage of having an analog TV tuner built in so I could also use
things like the old video games that had the Channel 3/4 output.
The device is buried somewhere so I can't tell you the brand.
> From: Fritz Mueller
> The most efficient way I think would be to work up a simple LDA loader
> that would fit in a boot sector, and load a diagnostic from contiguous
> disk starting at the second sector. It would then be easy to blast down
> just the boot sector and a single desired diagnostic
Yup, an .LDA loader wouldn't be hard.
> The good news is that my enhanced diagnostics now detect failures in
> the same physical banks and with the same bits
Excellent! I imagine you're busy with a soldering iron at this moment? :-)
Once those are fixed, it will be interesting to see if the problems you saw
with the OS's go away.
It'd be easy to hack V6 to turn on parity error detection, if you'd like to.
> Will have to see after I make the next round of repairs if there are
> still additional problems that the MAINDEC flags that my simplistic diag
> isn't shaking out.
It will be interesting to hear those results...
> I've also been somewhat surprised by the level of repair needed on this
> memory board. So far, I've seen 6 failed 4116 out of an array of 144
> total, so about a 4% failure rate. Is this typical for vintage 4116
I don't know about 4116's, but I've seen a fairly high failure rate on _some_
cards with 256K DRAM's - on one board, a couple of chips totally dead, some
others with just _some_ bad bits. Other cards were totally fine. I suspect it
depends on the chip manufacturer.
> Might be just a fastbus thing?
Could be - I'm not too familiar with the Fastbu.
> It's also hinted in paragraph 7.7.7 of the older KB11-A maintenance
> manual .. This particular text is removed from the later KB11-A,D
> maintenance manual, and the description there seems to imply all reported
> parity conditions trap directly to 114.
Ah... Looking at the "pdp-11/45 processsor handbook", 1972 and 1973 editions,
there's an "Appendix E: Memory Parity" (of which I was previously unaware!),
referred to in "2.5.6 Memory Parity". (I haven't checked to see if later ones
have it.) It claims there are "16 memory status registers ... each one
associated with an 8K section of memory". (It doesn't say whether UNIBUS
memory, Fastbus, or both!)
One bit in each register claims to be 'Halt Enable': "[when] set, the machine
will execute a halt if a parity error occurs"; when clear, it traps to 4!
Even better, it claims to be able to control whether the memory uses odd or
even parity! (How, for UNIBUS memory, I don't know - there's no way to do
this over the UNIBUS. And the MM11-L and MM11-U manuals indicate they both
use odd parity, although there's a CSR bit to allow wriring 'wrong' - i.e.
even - parity.)
Very odd. Maybe this was deleted in the hardware (or they decided not to do
it), and someone forgot to follow through in the manual? I recently found
another reference to a /45 CPU feature I'd never heard of - forget what it
was, alas!
> surprisingly, neither one of my M8106 has either a jumper or the
> indicated pull-up at that location! .... The fact that W1 exists on the
> M8119 is interesting; maybe the situation is that the prints are for
> later revisions, and my actual M8106 are earlier?
Could be. I wonder if there's any way to get ahold of the ECO list for that
card?
Noel
Anyone in the UK want a handful of Sun SCSI cables. Six cables of various
lengths with various combinations of narrow, wide and ultrawide connectors
including the tiny SCSI connectors. 5 quid as a paypal friend will cover
postage.
Regards, Mark.
All,
I'm looking for hardcopy of:
* Intel MCS-80 System Design Kit User's Guide
* Intel MCS-8 Manual (8008)
* Intel PROMPT-48 Microcomputer User's Manual
I've got PDFs of these, but I like original dead tree format when I can
find it.
Thanks,
Jonathan
> From: Paul Koning
> It checks if the bits 007750 are active in the parity CSR, if so it
> takes that to be an address/ECC parity CSR.
That's odd; those are the 'error address' bits. Maybe there's an assumption
that the sweep of memory to size it will have caused a parity error from
garbage in DRAM at startup? (If so, I wonder if it would work on a machine
with all core? :-)
> It figures out the CSR to memory association by going through memory in
> 1 kW increments ... This should set bad parity, and it scans all the
> CSRs to see which one reports an error ... If no CSR has that set, it
> concludes the particular block is no-parity memory.
Oooh, pretty clever - good workaround for rhe undefined relationship between
CSR's and memory.
If I added parity support to V6, I'd be tempted to do it with a
hand-configured table - devices are all manually configured anyway in V6, so
I'd be continuing a theme... :-)
Noel