> I'll start with getting VTServer to run under V6 (my only Unix, don't
> have anything later :-)
So, I just got VTServer runnin under V6: it successfully loaded a memory
diagnostic from the 'server', into the 'client', using 'vtboot' on the
latter. (Both running on emulated machines, for the moment - I thought I'd
take all the hardware-related variables out of the equation, until I have the
software all running OK.)
It didn't require as much work on VTServer as I thought it might: I had to
convert the C to the V6 dialect (no '+=', etc), and some other small things
(e.g. convert the TTY setup code), but in general, it was pretty smooth and
painless.
Note that it won't run under vanilla V6, which does not provide 8-bit input
and output on serial lines. I had previously added 'LITIN' and 'LITOUT' modes
(8-bit input and output) to my V6; since the mode word in stty/gtty was
already full, I had to extend the device interface to support them. I didn't
add ioctl() or anything later, I did an upward-compatible extension to
stty/gtty. (I'm a real NIH guy. :-)
My only real problem in getting VTServer running was with LITIN; I did it
some while back, but had never actually tested it (I was only using LITOUT,
for my custom program to talk to PDP-11 consoles, which also did downloads,
so needed 8-bit output). So when I went to use it, it didn't work, and it was
a real stumper! But I did eventually figure out what the problem was (after
writing a custom program to reach into the kernel and dump the entire state
of a serial line), and get it working.
(I had taken the shortcut of not fully understanding how the kernel serial
line code worked, just tried to install point fixes. This turned out not to
work, because of a side-effect elsewhere in the code. Moral of the story: you
can't change the operation of a piece of software without complete
understanding of how it works...)
Is there any interest in all this? If so, I can put together a web page with
the V6-verion VTServer source, along with the modified V6 serial line stuff
(including a short description of the extended stty/gtty interface), etc.
> so if you turn up whatever you used to boot V6, it would probably still
> be useful.
So I guess my next step, if I don't hear shortly from someone who has
previously used VTServer to install V6, is to start on actually getting
a V6 file system created.
I'm still vacillating over whether it would be better to go V6-style (and
just transfer a complete, small existing V6 filesystem), or V7-style (and
get stand-alone 'mkfs', etc running with V6-format file systems). Anyone
have an opinion?
Noel
Hi Noel,
>> Any chance it could be put into 'production'?
Sure, if there is interest, I could make a run of boards.
>> Also, what FPGA board are you using? I assume it's one that has an SD
>> card socket or something, for actually storing the bits on?
My project is just an interface board for an existing RL02 emulator
project: www.pdp11gy.com There are a multiple project revisions listed on
the pdp11gy.com site that use different Altera FPGA dev boards: DE0 Nano,
DE0 Nano SOC, and BeMicro CV.
I was planning to use a Terasic DE0 Nano dev board since these boards can
be found on eBay from $50 to $100. The DE0 nano does not have an micro-SD
card socket which is why there is a socket on my interface board.
http://sierracircuitdesign.ddns.net/temp/RL02
The DE0 Nano SOC, and BeMicro CV dev boards have micro-SD card sockets, so
if you used one of those, then you would not need to populate the micro-SD
socket on the interface board. According to the author of the
www.pdp11gy.com RL02 project, the 40-pin headers on DE0 Nano, DE0 Nano SOC,
and BeMicro CV are compatible, so you could use my interface board with any
of these boards.
Regards,
Scott
Does anyone have a datasheet for an Intel 8089A, 8089A-3, or 8089-3?
The only datasheets I've found are for the "plain" 8089 with no "A" or
numeric suffix. The component resellers show better availabiliity for with
the "A" and/or "-3" suffix, though it's possible that those are in error.
The 8089 is an I/O processor. The "-3" suffix is most likely a speed grade.
The standard part without the "-3" is 5 MHz.
Hello all together,
i restore a rk05 disk drive in combination with an Plessey RK8E clone
controller.
Now the drive itself is restored, and the connection cables are built.
My problem is that the rk8e diskless controll test (dhrka) fails with an
data break error. The diskless controlltest
is running throug all register and also the databuffer test. But in the
first data break routine it fails.
Then i toggled in the Example program from the maintanence vol.III,
Single Cycle Data Break Transfers (Write than Read).
With this program the content of the SwitchRegister is written through
the data buffer registers and read back to the memory.
Afterwards it is compared to the original SR content. I found out that
the routine is running if SR=7777. Deeper investigation results that the
bits 0, 1, 4, 6 and 9 have to be one`s to run the routine. The other SR
bits are switchable while running the program.
Next thing i did is trying read data with futil. i could read data form
the disk. But with many read errors.
Because i do not know anything about the allignment between my diskpack
and the drive, i formated the pack
with the RK8E Formater (dhrkd). The write part of the format is running.
In the disk checking part the formater fails.
Anyway. Then i used futil and scanned the whole surface off the
diskpack. On the whole disk are 5 bad blocks left.
Now i am able to dump blocks from the disk. But it seems that no matter
witch block i dump out, it is the same block
all over the disk. Afterwards i tried to modifie some words in block 0.
And this is working. When i write the modified block i see the
modification also in every other block of the disk.
Have anyone the lightning idea?
On a Google search i found a post of Rick Bensene from 2014 on this list
witch described a similiar problem.
In this discussion where talked about an spike in the load signal of the
current address register.
I checked that and see that this was not my problem.
Thanks in advance
Marco Rauhut
Hello,
we are discussing on separate thread about doing an universal interface for
PDP11.
I'm taking all the relevant documentation about Unibus and Qbus busses,
aiming to check the possibility of doing a board compatible, with some
adjustments, with both worlds.
I started to read the 1979 specifications, however it's not all clear to
me, specially about Unibus.
What I understood:
- Qbus is complete on A and B connectors, so a dual card could be done.
Some backplanes have a true serpentine, while some other has C and D with
other signals, but those are of particular usage with dual-board interfaces.
Basically both dual and quad boards can be done, with the latter using A
and B and simply propagating grant on C and D, supposedly connected in
standard serpentine.
Unibus: the specifications are describing A and B, but backplanes are
complicate than that, and can have Unibus, Modified Unibus, Extended
Unibus, SPC...
What for?
If all the signals are in AB, why they are connected again in CDEF?
There's some complete documentation about the different backplane types,
and the standard approach for an Unibus board?
Thanks
Andrea
> From: David Bridgham
> Just the bus interface takes over half the area of a dual-height board!
In part because the level converters are SMD, and we had to mount them on
(modified) wide DIP carriers to use them in a wire-wrap board.
> I've played around with laying out what might be the production board
> ... and I've got it down to a row of 8641 bus transceivers and a row or
> two of the level-converter chips.
> http://pdp10.froghouse.org/qsic/proto-pcb.jpg
For those looking at that picture, it's not our current plan for 'producton'
QSIC's; the one in the picture uses a daughter-card with an FPGA on it, but
that makes the card to high to fit into a single slot. So the current plan is
to do a card with an FPGA on it directly.
Noel
> From: Glen Slick
>> Went unsold at $3500. Relisted, this time at $5000.
> there was a taker for that 11/35 at $5000 today....
Smack me with a wet halibut. They must not have seen the original listing?
I can't come up with any other explanation why someone would pass up a chance
to buy it for $3.5K, and pay $1.5 more for the priviledge...
Noel
> Philipp Hachtmann wrote:
> Was it really sold? I can't figure that out from here. Only "listing
> has ended". And when I try to search for it, the website doesn't show
> it :-(
??? If you go to the listing:
http://www.ebay.com/itm/142146207101
the image has 'Sold' emblazoned across it. And if you click on that image, it
takes you to the original listing, which says "Sold for: US$5,000".
Noel