At 16:47 -0600 11/15/11, Eric wrote:
>In that timeframe I was using a single Motorola DSP56001 to do
>Mandelbrot set computations, and it was *much* faster than an array of
>8051s. ... Originally I did this with a
>386 PC, but later hooked it up to a Macintosh, and Dave Platt added
>plugin support to MandelZot so I could use it without writing an entire
>custom Macintosh application....
MandelZot - one of my favorite-ever applications, and Dave
Platt is one of my favorite-ever software authors (just for that
program). If you still talk to him, please send my regards and thanks!
I saw once, but don't have, a NeXTStep application which did
a side-by-side comparison of Mandelbrot set calculations on the 68030
(on the original Cube) and on the DSP56000 audio co-processor. The
DSP56000 was faster.
That application dropped off the NeXT radar when the newer
machines came out with the 68040, since that CPU was faster than the
DSP56000.
Personally, I think it would be awesome to resurrect that
code and get Distributed.net running on my NeXT's '040 and 56000
simultaneously, but have not managed to squeeze time into my schedule
to (learn how to and then) do that.
At 16:47 -0600 11/15/11, Ethan wrote:
>...ISTR there's an expiry mechanism in the SETI at Home client that
>if you request a work unit and don't return it in a few days or weeks,
>it's discarded. ... essentially it put a de facto lower bound on the
>amount of CPU you could throw at the problem ...
AFAIK, Distributed.net doesn't have that feature since the
only problems they (currently) work on are very massively parallel:
http://www.distributed.net/
for details. Current clients for AmigaOS/68k and NeXTStep/68k (I'm
running it) exist, so that may give a de facto lower boundary for the
effective compute power an 1802 array would have to contribute, but
I'll go out on a limb and suggest you probably can contribute with
anything you can make run. Their *earliest* projected completion date
for any active project is 22-Jul-2015.
--
- Mark 210-379-4635
-----------------------------------------------------------------------
Large Asteroids headed toward planets
inhabited by beings that don't have
technology adequate to stop them:
Think of it as Evolution in Fast-Forward.
Or at least my BeBox does: the Time control panel won't let me enter the
year 2011. I set it to 2005 since that was the calendar match.
I can't find anywhere that addresses this for R5 -- anyone know? The epoch
seems to start in 1965, so assuming it is a 32-bit time counter, internally
it should still be able to handle that.
--
------------------------------------ personal: http://www.cameronkaiser.com/ --
Cameron Kaiser * Floodgap Systems * www.floodgap.com * ckaiser at floodgap.com
-- "I'd love to go out with you, but I'm taking punk totem pole carving." -----
Hi guys,
I've just uploaded a new version of my AT&T 3B1 emulator:
http://hg.philpem.me.uk/3b1emu/
Andrew Warkentin sent me two patches this morning which fix a
long-standing CPU emulation bug and an issue with the polarity of the
UDS and LDS bits in the BSR0 register.
The end result of this is that the current TIP build will run the full
battery of PVTEST CPU diagnostics, with the exception of the hard disk
controller test (which is hardly surprising seeing as I haven't
implemented the HDC). For reference -- this is either the Simple Mode
CPU test, or the Expert mode (s4test) Test 12,0 (group 12, ALL subtests).
Still to do:
- Hard disc controller emulation
- Fix the floppy controller implementation (this still fails PVTEST
with a Read Timeout error, but boots the Test disk correctly...)
- Add support for emulating the different motherboard revisions
- Add some form of status bar along the bottom (disc status,
heartbeat/status LEDs and so on)
- Add some form of UI to allow disc images to be swapped in and out
- Serial I/O and modem emulation (or at least enough of a facsimile
to fake out the I/O tests).
- Add some way of triggering the extended keys (a PC keyboard doesn't
have enough keys to emulate the entire 3B1 keyboard).
- Try and reduce the CPU load. It currently runs my 1.6GHz AMD
MV40-based laptop at near 100% CPU...
Comments, criticisms and patches are, as always welcome
Thanks,
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/
> As far as I know, there is no reasonable logic design
> using transmission gates that can't be restructured to use something
> else instead.
Probably true but some designs using transmission gates are so incredibly elegant. Look up Caldwell
and Keister-Ritchie-Washburn and you will find that there are some classes of problems that are handled very nicely with transmission gates (AKA relays) but are cumbersome with more modern symbology. This class of problem is broadly called "iterative networks". And these are real world problems important to designers of low to high complexity systems in that era. Interestingly, since the modern tools no longer make these problems feasible, hardly anyone tries to solve them with the same efficiency anymore. (Some of the combinatoric problems that are easy with iterative networks happen to overlap closely with classic cryptography BTW.)
> Transmission gates are really a hardware optimization,
> and not part of pure digital design.
Maybe, if you definition of pure digital design limits you to NANDS for example. But all the logic design handbooks/textbooks up until the 60's were inclusive of transmission gates as basic elements.
Tim.
Hi guys,
I've just uploaded a new version of my AT&T 3B1 emulator:
http://hg.philpem.me.uk/3b1emu/
Andrew Warkentin sent me two patches this morning which fix a
long-standing CPU emulation bug and an issue with the polarity of the
UDS and LDS bits in the BSR0 register.
The end result of this is that the current TIP build will run the full
battery of PVTEST CPU diagnostics, with the exception of the hard disk
controller test (which is hardly surprising seeing as I haven't
implemented the HDC). For reference -- this is either the Simple Mode
CPU test, or the Expert mode (s4test) Test 12,0 (group 12, ALL subtests).
Still to do:
- Hard disc controller emulation
- Fix the floppy controller implementation (this still fails PVTEST
with a Read Timeout error, but boots the Test disk correctly...)
- Add support for emulating the different motherboard revisions
- Add some form of status bar along the bottom (disc status,
heartbeat/status LEDs and so on)
- Add some form of UI to allow disc images to be swapped in and out
- Serial I/O and modem emulation (or at least enough of a facsimile
to fake out the I/O tests).
- Add some way of triggering the extended keys (a PC keyboard doesn't
have enough keys to emulate the entire 3B1 keyboard).
- Try and reduce the CPU load. It currently runs my 1.6GHz AMD
MV40-based laptop at near 100% CPU...
Comments, criticisms and patches are, as always welcome :)
Thanks,
--
Phil.
philpem at philpem.me.uk
http://www.philpem.me.uk/
From: Kevin Bowling <kevin.bowling at kev009.com>
> Also, the link is not working for me :(
I'm not sure why, sorry about that.
The book is now on the front page of Darryl's blog. Hopefully this link
will work:
http://blogs.oracle.com/d
> I know the M8417 AA is 16k, and the BB is 32k, but I have a BE and a BF.
> Anyone have a list with these numbers on it?
With very few exceptions on DEC solid state memory boards over a long era, first letter is the size, second letter is the chip manufacturer.
Often for the first letter, each letter up means a doubling in capacity but not always true (because there were 3/4 populated boards for example.)
The mapping of last letter to manufacturer depends on rest of part number.
M8417-BB is 32Kx12 Mostek 4027 chips
M8417-BE is 32Kx12 Fujitsu 8227 chips
M8417-BF is 32Kx12 Intel 2104A chips
The "Edited Option Module List" is your friend. Hardly pocket sized though :-)
I have a Xilinx ML605 Dev kit I would be willing to attempt this with if someone thinks its valuable, but I am a newcomer when it comes to FPGA. I do have the full toolsuite.
Kevin