test-drb January 2011

test-drb@ccmp.vtda.org

130 participants
209 discussions

by silent700＠gmail.com

Seems they are willing to implement software support for hard-sectored 5.25" disk formats if someone can provide them with some known-good examples to work with. Preferably in the UK: http://forum.kryoflux.com/viewtopic.php?f=3&t=117 -- jht

13 years, 3 months

Any error correction gurus in the audience?

by classiccmp＠philpem.me.uk

Hi guys, As the subject says: are there any EDC/ECC code experts hanging around on the list? I'm working on implementing the 4-byte (32-bit) ECC code Western Digital used on the WD2010 Winchester HDD Controller IC. This appears to be an implementation of the ECC scheme explained in section 7.6 of National Semiconductor's "Disk Interface Design Guide and User's Manual" (appnote AN-413). It looks like the ECC scheme is based on running a CRC forwards over the data to produce a 32-bit CRC, which is used to validate the data in the same way the 16-bit CRC validates the IDAM. Error correction apparently operates by running the CRC in reverse using an "inverse polynomial". I can't see how this could work -- isn't a CRC by its very nature a one-way operation? The application note calls this a "Glover 140A0443" code, but doesn't bother to reference any papers, books or similar on the subject. There's an example on how to program NSC's controller chips to use the code, but nothing on the mathematical background behind it. For instance: how does it work, and why is the maximum correctable error burst 5 bits long? Does anyone recognise this polynomial? x^32 + x^28 + x^26 + x^19 + x^17 + x^10 + x^6 + x^2 + 1 aka. x^32 + x^28 + x^26 + x^19 + x^17 + x^10 + x^6 + x^2 + x^0 or: 0x140A0443 It's not a standard CRC32 polynomial (according to Das Wiki), and I don't *think* it's a Fire code... though I've been looking for the original paper on those (P. Fire, "A class of multiple-error-correcting binary codes for non-independent errors". Sylvania Reports RSL-E-2, Sylvania Reconnaissance Systems, Mountain View, California, 1959) and haven't had any success -- a few hits on Citeseer, but it appears all copies of the paper have vanished into thin air. What I'd really like to find out is more about how this algorithm works... a model implementation (e.g. in C, Python or similar) would be extremely useful, but at this point even a basic worked example ("here's a chunk of data, now watch what happens if we flip some bits, and here's how we fix it") would be extremely useful... Thanks, -- Phil. classiccmp at philpem.me.uk http://www.philpem.me.uk/

13 years, 3 months

need Num Lock keycap for IBM Model M

by rescue＠hawkmountain.net

Anyone have a dead model M or some keycaps around. I rescued this one from a recycle pile and it works fine.... a few key caps were off it and I found them, but missed the fact the num lock cap was missing, and now the pile has been hauled off.... so no looking for it now. Let me know if you have a Num Lock key cap. -- Curt

13 years, 3 months

ANN: DiscFerret speaks ST506!

by classiccmp＠philpem.me.uk

Hi guys... I've just this second got my DiscFerret talking to an ST506 hard drive. Specifically, a Control Data / Magnetic Peripherals 94205-51 "Wren IIHH", apparently also known as the Seagate ST253. 989 cylinders, 5 heads, 17 sectors. It also seems to bear an uncanny shape-and-weight resemblance to a breezeblock... But anyway, I digress. First, the pretty pictures: Linear histogram: http://www.discferret.com/temp/st506/dat.lin_histogram.png Logarithmic histogram: http://www.discferret.com/temp/st506/dat.log_histogram.png Scatter graph: http://www.discferret.com/temp/st506/dat.scatter.png The log-histogram shows a very distinctive MFM timing pattern (three peaks at 1T, 1.5T and 2T), and the scatter-graph shows that the timing data is split into 17 distinctive segments: the sectors. So what's the catch? 1) The DiscFerret PSU doesn't have enough grunt to run a Winchester drive (or at least a 5.25 half-height like the Wren) and a 3.5in floppy drive at the same time. This is an academic point, because you need an adapter board to hook the 'Ferret up to the ST506 drive, and you can't have both a floppy drive and the adapter plugged in at the same time. 2) I haven't got the software decoder working. Yet. I need to play with the sync-word scanner -- the WD2010 controller chip does strange things to the IDENT flag byte. Adding a few don't-care bits to the mask and implementing a 16bit CRC should sort this out. The data looks good, but I can't prove it until I make MagScan read it. I've made a few modifications to the Microcode too: - The acquisition and RAM Write clocks have been increased to 100MHz. This provides a bit more timing resolution, and makes it a little easier to convert from a timing count to an absolute time (especially if you're reading a timing histogram and don't have a calculator). - The data separator has been partly re-implemented. I've ditched the shift-register counter in the DPLL and replaced it with a parameterised binary counter. Now the sync-word detector can run from almost any reasonable input clock rate. I've got it running at 40MHz at the moment (it used to run at 32MHz). - A FIFO has been added between the data sources (acquisition module and parallel port) and the memory write controller. I did this because there was a risk that a timing value could be lost if a transition occurred within 5 or 6 clocks of a RAM write (the previous transition, or a counter overflow). Still to do: - Make the current acquisition abort if the FIFO overflows - Decouple the acquisition and memory-write clocks. The RAM has a 10ns access time (i.e. 100MHz), and I'd like to see if the acquisition engine can be made to go faster. This should work as long as it doesn't get hit with more than 256 fast transitions in a burst... The DPLL change came about because the FPGA I'm using only allows the on-chip PLLs to be driven from a global clock input, and only one PLL can use the GCK. So for each PLL you want to use, you have to provide a separate GCK... This is a fairly easy board tweak (you bridge two pins on the FPGA with wire or solder), but it'll break backwards compatibility... :( So a good day was had by all, it seems :) The new Microcode is in the usual place (the Mercurial repository). I'll push a compiled version into the Firmware repository in the next couple of minutes. Thanks, -- Phil. classiccmp at philpem.me.uk http://www.philpem.me.uk/

13 years, 3 months

RA81 Disks Will Not Spin up at the RICM.

by michael.99.thompson＠gmail.com

So far we have tried 5 RA81 and 1 RA80 disk at the RICM. They all have the same symptom, when you push the RUN button. The drive starts to spin up for just a few seconds, then stops and lights the FAULT light. We ran diags on one of the drives. The details are here: https://sites.google.com/site/ricmwarehouse/Home/equipment/dec-pdp-1144/pdp… We made sure that the heads were unlocked and the drive belt was engauged. Debug suggestions would be appreciated. -- Michael Thompson

13 years, 3 months

Need RL02 Controller for PDP-11/44 Restoration

by michael.99.thompson＠gmail.com

I pulled two RA70 disks from a pair of VAX-3500s that I have. By some miracle both drives spin up and go ready when the Operator Control Panel is connected. I was thinking that one of these drives would work nicely with the UDA50 disk controller in the 11/44 until I can get the RA81s sorted out. These drives are supposed to work with the Operator Control Panel. There is a button on the back of the drive that says Unit Number Accept. I pushed the button both before and after power up, but the RA70 does not spin up. Anyone have a manual for this drive or know how to get it work without connecting an OCP? -- Michael Thompson

13 years, 3 months

Most used toys, was Re: The late, great TRS-80

by thollowell＠designdata.com

Hey Peter, Do you still have your MV7800? If so, do you want to sell it? Thanks, Tom

13 years, 3 months

Need RL02 Controller for PDP-11/44 Restoration

by michael.99.thompson＠gmail.com

I am reassembling a PDP-11/44 from parts for the Rhode Island Computer Museum. I would like to try an RL01 or RL02 drive on the system, but we don't have another RL02 controller. Do any of you have a M7762 RL11 disk controller board that you could donate or sell inexpensively for this project? The RA81s won't spin up, so I suspect that I need to replace the starting capacitors. Do any of you know where to get replacement starting capacitors for the RA80 or RA81 drives? Details on the project are here: https://sites.google.com/site/ricmwarehouse/Home/equipment/dec-pdp-1144 -- Michael Thompson

13 years, 3 months

Usenet

by jhfinedp3k＠compsys.to

I assume that a few of the list members still follow specific Usenet sites. A few days ago, I became aware of an additional free server for many TEXT ONLY sites. I don't want to flood them with subscriptions, so if you are a list member send me a post privately. At present, I subscribe to 2 such servers. At least one, probably both, accept posts via the Netscape browser under W98 SE which is what I use. I can't vouch for anything else, but likely IE is also acceptable. Jerome Fine

13 years, 3 months

FS: 1200 baud external modem

by charlesmorris800＠centurytel.net

FS: one "BSR 1207" external modem. New in the (very old) box. I assume it's 1200 baud. Runs on 120 vac. Can send pic to interested parties. $4.99 plus shipping (probably around $3-4, it's light) >from US zip 65775. There's one on that auction place right now 220714815493 for the same price, but he wants $16 shipping! thanks Charles

13 years, 3 months

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test-drb January 2011