test-drb November 2009

test-drb@ccmp.vtda.org

175 participants
194 discussions

by geoffr＠zipcon.net

This is the way we burn the roms (now to find some MCM6810 or compatible rams and upgrade the ram in my old 1050 non double density) and make a US doubler compatible 1050. Copied the rom from my other USDblr 1050, and need to make the piggyback ram. ?course my DD 1050 needs new ram, it?s damaged too :(

14 years, 5 months

S-100 IDE project

by lynchaj＠yahoo.com

Hi! My good friend John and I are working on a joint www.S100Computers.com & N8VEM <http://groups.google.com/group/n8vem> S-100 IDE project. It is based on the following design by Peter Faasse. http://www.pjrc.com/tech/8051/ide/wesley.html John built a working prototype and some software and I am making a PCB. The PCB is in trace route optimizing phase now. I can't say exactly when a PCB will be available but if you think you might be interested please let me know. PCBs will probably cost *about* $22 give or take some plus shipping. If you do want a PCB it is important you tell me beforehand so I can include it in the manufacturing order. The board will connect to regular IDE devices and includes mounting areas and interfaces for laptop (2.5" with the high density 44 pin connector) and CF adapters. John has his prototype working with a CF adapter mounted on the PCB and it seems to work fine. Thanks and have a nice day! Andrew Lynch

14 years, 5 months

DEC X8 pdp8 exerciser?

by hachti＠hachti.de

Hi folks, I've heard of something called "DEC X8", a modular pdp8 exerciser. Does someone have this? I don't have it and I've been further told that it can be used to run acceptance tests on pdp8 without the need for all that little maindecs... Best wishes, Philipp

14 years, 5 months

Heathkit Sweet-P plotter

by ronald.carlson.54＠sbcglobal.net

Joe, Saw your message in the archives. I have the Sweet-P documentation, full manual, assembly, programming examples and schematic. Contact me if you still have the Sweet-P. Regards, Ron Carlson

14 years, 5 months

You can help to solve the greatest mystery of all mankind! Help identify this printer from 1966, hardest item I have ever tried to find information on.

by wlsilva＠sbcglobal.net

Hello I am trying to identify this rack printer from the time period of 1966. The printer circled in this photo http://www.flickr.com/photos/19997518 at N02/4085043282/ is the unit in question, it was made by "Franklin" , and you can imagine the search results I get when searching for "Franklin printer" EVERYTHING is about Benjamin Franklin. The equipment in the photo is a Delco missile guidance telemetry monitor, I have seen photos of the same printer used in Nasa tracking station equipment from the 1960's, and I know that a aircraft version of the printer was used in military planes of the same time. We are trying to restore a Delco Telemetry console from the 1960's that is missing the Franklin printer, and we would like to try to find one to replace the original. If anyone can provide information about the company that made these printers (I assume they went by the Franklin name) or can ID this actual printer model, it would be off immense help for us, we assume they were a USA company, but that is all I know. I did get to talk with the gentleman that was in charge of the Delco telemetry dept in 1967, and the only information he could recall is that the printer was a impact printer, made by Franklin, and was a high end unit for its day. Thanks to all, and silly prize to anyone who can solve this ! Walter wlsilva at sbcglobal.net

14 years, 5 months

S-100 IDE project

by lynchaj＠yahoo.com

Reply to http://classiccmp.org/pipermail/cctalk/2009-November/278452.html Hi! John has some CBIOS software for CP/M 3.0 based on his system. I do not know what the maximum drive size is but on the N8VEM DiskIO board CBIOS for CP/M 2.2 the maximum size is 8MB. I believe the 8MB limit also applies to the S-100 IDE board. At least in theory you could implement your own CBIOS extensions for partitions and the like. We are doing something akin to that on the N8VEM project for the SBC DiskIO CBIOS. However that is a completely separate project from this board. Anyone who gets one of these S-100 IDE boards would have to integrate it into their CP/M system using the PCB, the schematics, and the example code. No further support is offered. As John wisely says on comp.os.cpm "Please note these would be bare cards, a schematic and that's it. Building the board and implementing CPM etc., you are on your own. This is not a project for first timers." There you have it -- Caveat Emptor. Thanks and have a nice day! Andrew Lynch How are you getting around the 8meg max drive size common with CPM ? Are you splitting it into many small drives in hardware on in the driver like Morows dod for the M26 ? I have an old MPM system that had an M26 on it I would like to bring back to life. The other Bob On Fri, 6 Nov 2009 16:42:28 -0500, Andrew Lynch wrote: >Hi! My good friend John and I are working on a joint www.S100Computers.com & >N8VEM <http://groups.google.com/group/n8vem> S-100 IDE project. It is based >on the following design by Peter Faasse. >http://www.pjrc.com/tech/8051/ide/wesley.html >John built a working prototype and some software and I am making a PCB. The >PCB is in trace route optimizing phase now. I can't say exactly when a PCB >will be available but if you think you might be interested please let me >know. PCBs will probably cost *about* $22 give or take some plus shipping. >If you do want a PCB it is important you tell me beforehand so I can include >it in the manufacturing order. >The board will connect to regular IDE devices and includes mounting areas >and interfaces for laptop (2.5" with the high density 44 pin connector) and >CF adapters. John has his prototype working with a CF adapter mounted on the >PCB and it seems to work fine. >Thanks and have a nice day! >Andrew Lynch

14 years, 5 months

A few classic computer photos

by ard＠p850ug1.demon.co.uk

I've put a few photos of mostly classic computer stuff on flickr. From memory, there are some floppy drives coming apart, the boards from the HP9820 calculator, repairing the printer and card reader for that machine, upgrading the memory in an HP integral and an HP42S, and a few more. Do a search for tony_duell to find them.. Don;t try to make sense of the 'photostream', the sets, howerver, are in a sane order. Enjoy -tony

14 years, 5 months

design rules for classic computer PCB projects

by lynchaj＠yahoo.com

Hi! I've been doing some PCB design work for various classic computer projects and would like to discuss and hear some advice from experienced PCB designers regarding design rules. What design rules do you normally use for vintage and/or classic PCB projects? Clearly the design rules depend on the application and technology involved. Normally, my projects are in the style typically from the late 1970's and early 1980's style technologies such as PC/XT ISA bus, ECB, S-100, etc. The components are typically 74LSxxx TTL DIP parts meant for easy and reliable construction. There are no SMT components or very high frequency signals. My typical starting design rules are 17 mil traces for signal, 51 mil traces for power (VCC and GND), air gap (min clearance) of 11 mils. Grid size varies depending but usually is 25 mils although I prefer 50 mils. Component pads are typically 55 mils diameter with a 32 mil hole. Connector pads are 60 mils diameter with a 40 mil hole. These parameters allow for a single trace to be routed through the pins of a typical device. Vias are 45 mils in diameter with a 25 mil hole. There are no blind or micro vias allowed since all of my projects are use 2 layer PCBs. Normally the signals for my projects are in the range of 1-8 MHz. Occasionally there is signal as much as 16 MHz clock but those are few. The harmonic content would contain higher frequencies since this is almost entirely digital circuitry and square waves are prevalent. I aggressively review and optimize the PCB layout and trace routing to minimize vias and overall trace length. This phase can be very time consuming but I think it is worth it. Of primary concern to me is trace length due to legacy busses, board density, size, and mainly using 74LSxxx technology. I've found longer traces can result in greater impedance for both signal and power which can interfere with proper operation. As a result I am using the 17 mil signal traces and 51 mil power traces to minimize impedance and the resulting voltage drops. Long traces can also have other effects which can raise havoc on digital circuits. Solid power supply rails is important so when I think a design is going may use a lot of power I specify 2 oz copper weights although for most PCBs it is only 1 oz. The wide signal and power traces are where I think my designs might be overly conservative. The really old PCBs I have seen are as much as 20 mil signal traces but most recent PCBs are less and around 10 mils and sometimes smaller. Minimizing switching transients is important so I normally place a 0.1 uF bypass monolithic ceramic capacitor per IC. Normally there is a larger 22 uF electrolytic or tantalum bypass capacitor placed across the main VCC to GND supply rails at the entry point to the PCB. So far the PCBs have turned out to be fairly reliable and easy to build. There have been a couple of errors but those are cases of where signal or power traces were either connected wrong or left off entirely due to EDA library problems. Things seem to be working fine although I am curious as to what other designers are using and why. I would like to improve my projects to make them the best possible and if there are ways to reduce trace length and minimize the number of vias. There are some sources of information on the internet regarding PCB design but much of the recent material is focused on SMT, low power, and/or very high frequency components. Often times I see trace widths less than 8 mils which to me seem quite hazardous. Here is a good link for some discussion on how to design a PCB for reliable manufacturing. It is about the right age for the projects I like to work on and the design rules are fairly consistent with mine but not exactly. I tend to be a bit more conservative with regard to larger trace width than the author. http://www.pic101.com/using_tango.htm Thanks in advance for any advice and/or insight on proper PCB design. I appreciate your thoughts and comments. Please no flames, this is intended to be a serious and on topic question. If you are going to change the topic please make a new subject. Thanks and have a nice day! Andrew Lynch

14 years, 5 months

HP monitor and keyboard available

by henk.gooijen＠hotmail.com

Hi all, whilst cleaning out, I found an HP monitor with accompanying keyboard. A label on the keyboard reads C1400A (?) and on the monitor is a label that says 700/92 and 1001G. They are in working order, the screen lights up green, characters are sharp, so the CRT is fine. I guess that it will be local pick up only in Helmond, The Netherlands. Shipping in The Netherlands will probably cost just 6.75 euro, but outside the country will get too expensive. I am willing to ship it though, just hate to trash it, but that's going to happen in a week, if nobody wants it. - Henk.

14 years, 5 months

Looking for multibus ethernet card (For Sun 2/120)

by derschjo＠mail.msu.edu

Got the fun parts of a Sun 2/120 workstation (a backplane and 2 sets of CPU, Memory, FPA and SCSI boards -- anyone have a spare Sun 2 chassis? :)) in a trade with another generous list member, and I've kind of got it running on my bench here... I'd like to get it connected to the Internet at some point. I'm looking for a 3Com 3c400 multibus ethernet interface... anyone have one spare to sell/trade? Thanks as always, Josh

14 years, 5 months

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test-drb November 2009