Hi Jim,
> Greetings.
>I purchased a couple weeks ago a metal box full of
>unit record docs, forms and cards ($20). Including
>Ramac 305 guide and manuals for various collating,
>punching, as well as some training manuals. I'd be
>happy to have it go to a good home. I've got a
>spreadsheet with more details I can send on request.
>The box full is very heavy so I would a pickup in the
>San Francisco Bay area.
>.
>Thanks, Jim
Bitsavers.org would very good home for these IBM manuals.
Regards Henk
IBM collector
On Fri, 11 Aug 2006 12:58:56 -0700, Brent Hilpert <hilpert at cs.ubc.ca>
wrote:
>> Chuck Guzis wrote:
>>> At one time async logic was a hot topic.
>>
>> The IAS machine (von Neumann/late 1940s) is listed in various
>> places (under
>> 'clock rate') as being 'async'. (And - annoyingly - those listings
>> then don't
>> provide an effective instruction rate for the sake of comparison).
>>
>> I've been curious as to more precisely how the timing was
>> accomplished in that
>> (those) machines. Offhand, I suspect you still end up with delay
>> elements in
>> the design at various points to ensure some group (worst case) of
>> signals/paths
>> are all ready/stable at some point and you end with a more-or-less
>> 'effective
>> clock rate' anyways and don't gain much.
>>
>> Such all started with ENIAC didn't it?, which - based on what I've
>> been able
>> to find/read - could be described as an async design.
>> Was async still being discussed in the 60's?
>
Serious theoretical work was done for relay logic prior to ENIAC and
it definitely isn't dead right now. There is a substantial amount of
work being done in the area with the UK being a hotspot of activity.
Early this year ARM and a Philips subsidiary released an ARM core
that was entirely async. For those interested, this is an excellent
resource:
<http://www.cs.manchester.ac.uk/apt/async/>
CRC
>Date: Fri, 11 Aug 2006 12:58:56 -0700
>From: Brent Hilpert <hilpert at cs.ubc.ca>
>Chuck Guzis wrote:
>> At one time async logic was a hot topic.
>
>The IAS machine (von Neumann/late 1940s) is listed in various places (under
>'clock rate') as being 'async'. (And - annoyingly - those listings then don't
>provide an effective instruction rate for the sake of comparison).
>
>I've been curious as to more precisely how the timing was accomplished in that
>(those) machines. Offhand, I suspect you still end up with delay elements in
>the design at various points to ensure some group (worst case) of
>signals/paths
>are all ready/stable at some point and you end with a more-or-less 'effective
>clock rate' anyways and don't gain much.
>
>Such all started with ENIAC didn't it?, which - based on what I've been able
>to find/read - could be described as an async design.
>Was async still being discussed in the 60's?
I worked on some "non-clocked" logic designs for a little company
called Theseus. As far as I know they're still in business. It's
been a while, so my memory is hazy and it was definitely
unconventional design.
The basic scheme (IIRC) was to use two wires per bit of information.
Three of the four possible states were used. '0' and '1' were two of
the states and 'ready' was the third state, except I don't think they
called it 'ready' but that'll do for this discussion.
When you reached a set of registers (flops) in the logic (say a
grouping of 8 bits for a bus) you'd have 'acknowledge' logic which
would would signal back upstream that it was ready for the next
computation. It depended on all eight registers reaching a data
state (0 or 1) before it signaled ready back upstream. Then and
this is where I get hazy, all the registers would get reset to the
ready state before the next set of data is processed. I think. It
really has been a while.
So, in practice, you have 2 to 4 times as much logic because you have
two wires per bit plus acknowledge logic flowing back upstream.
On the other hand, if nothing is being processed, then your circuitry
is idle and not switching. This can save a bundle of power depending
on the application.
Additionally, the logic pipeline can operate as fast as it possibly
can, without being held back by a clock. So in some cases one gains
speed. And you don't have to worry about routing finicky clocks all
over the chip.
Still, you have the overhead of those acknowledge signals.
Plus, being an unconventional logic, there are not sophisticated
tools and libraries available, so it takes longer to design for and
requires more design discipline from the designer.
If you applied the same amount of effort and discipline to
conventional design, you might end up with something just as good or
better, but the non-clocked logic paradigm forces the extra effort.
Supposedly, non-clocked logic can also offer greater security because
there's no clock signal for remote sensors to key on when trying to
sense what the CPU is doing. This seemed a little odd to me. Do
espionage types really try to sense what a processor is doing
remotely, based on the EM emissions from the chip?
Jeff Walther
A while back I'd sort of thrown something together with a bunch of logos on a
web pages, and since Jay expressed some interest in that some time back I
uploaded it, but since I wasn't happy about a number of aspects of it back
then I didn't link to it and didn't publicize it.
Then in the past few days I got a request from one other correspondent who was
looking for similar info, and pointed him at the page, which he was nicely
impressed with, and at the same time dug around in my pile of downloads for
some more of them I'd snagged since then.
I then put this all together, and have uploaded the result, which can be
seen here:
http://www.classiccmp.org/rtellason/logos/semiconductorlogos.html
and which is now also linked through my parts pages at:
http://www.classiccmp.org/rtellason/parts-index.html
Perhaps some of you will find this information useful.
--
Member of the toughest, meanest, deadliest, most unrelenting -- and
ablest -- form of life in this section of space, a critter that can
be killed but can't be tamed. --Robert A. Heinlein, "The Puppet Masters"
-
Information is more dangerous than cannon to a society ruled by lies. --James
M Dakin
I'm in need of 10 monochrome adaptor cards for the PC. I'll pay $10 each
in any quantity plus shipping.
Please send your offerings directly to me. I do not read the list. I
need these ASAP.
Thanks!
--
Sellam Ismail Vintage Computer Festival
------------------------------------------------------------------------------
International Man of Intrigue and Danger http://www.vintage.org
Jeff quipped
>Does that mean that you *have* figured out a way to solder BGA into
>place at home?
It means that I haven't been able to pull any chips to practice with yet.
Mike sayith:
>Is it not rude to presume that we all subscribe to this list so that we
>can read and try the fill the urgent requests of others who post to the
>list but won't bother reading it?
In general, probably, but I'd be inclined to give Sellam a special dispensation - he was an active listmember for
quite some time and hopefully will be again when his (daughter|son, can't remember) grows up a bit.
Phenomenal resource, like Tony.
--- Don <THX1138 at dakotacom.net> wrote:
> Tony Duell wrote:
>> snip <<
> >
> > I've had blets turn to a sticky rubber blob (lik
e
> the rollers in the
> > other thread), then you can't match it up.
>
> I've only seen problems with "rubber feet" --
> especially on
> Sun gear -- disintegrating. And, they end up
> messier than
> a wad of chewing gum that has been sitting in the
> summer
> Sun for a day... :-(
>
> Don
I have had similar problems with the "feet"
on some of my oldish consoles (I would say old
but I feared people would think of the Atari's
and such from the early 80's). One "foot"
on the bottom of my SNES turned half to mush
whilst the other three "feet" are perfectly
fine!
Not sure what caused it to happen... but as
long as the SNES works I'm more than happy ;)
Regards,
Andrew B
aliensrcooluk at yahoo.co.uk
>Date: Fri, 11 Aug 2006 18:39:52 -0500
>From: Scott Quinn <compoobah at valleyimplants.com>
>The really annoying thing about BGA is that I haven't figured a way to
>desolder and reuse chips. Very vexing.
Does that mean that you *have* figured out a way to solder BGA into
place at home?
Jeff Walther