Hello Jos,
well, the holidays are over, gotto go to work tomorrow.
Why I am writing this? Sorry to post to the list, but I only
seem to have your e-mail address at work.
Anyway, I have an RL02 terminator, and a cable, but, and
that brings me to the first line, I can not test the cable.
I hoped to find time to work on the not-working RL drives
of my 11/34, but ...
Happen to be in the neighborhood? The cable is a bit
heavy to ship to Switzerland. If you are not in a hurry,
I keep them for you.
- Henk, PA8PDP.
________________________________
Van: cctalk-bounces at classiccmp.org namens Jos Dreesen
Verzonden: zo 01-01-2006 19:23
Aan: cctalk at classiccmp.org
Onderwerp: Looking for some PDP11 bits...(Europe)
To be precise, i'd like to acquire :
- a pdp11/23 frontbezel (BA23).
- a rl02 terminator
- one rl02 cable
- a bit of qbus memory.
- boot proms for pdp11/34 rl02 combo.
I also have a RX02 outer shell to give away. ( Turns a rackmounted
RX02 into a deskmounted RX02 )
Also an empty BA23 with powersupply is avaliable.
Location : Switzerland / Holland / Belgium.
Jos Dreesen
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Thank you for your cooperation.
Since I haven't updated my site in a while, I
decided to get out my digital camera yesterday
and take some pictures. I've added quite a
few pictures of DEC PDP-11 systems and
peripherals I've acquired in the past year.
When I get time, I'll add more technical info,
but for now there are pictures and a small
blurb of mostly non-tech info about each item.
Take a look. Leave a message on my
message board if you are so inclined.
The new stuff is under the "PDP-11 Collection"
link on the left hand nav on my site at:
http://www.woffordwitch.com
Happy New Year and Happy Classic Computing!
Ashley
I'm looking for about 20-40 units of serial terminal, with 20 being
the bare minimum that I need for the project. Realistically, spares
will be needed, so more than 20 units are preferred.
A more modern vintage preferred. Something reliable. All units
should be the same color (amber/green) phosphor and have the same size
CRT. In this particular situation I'm looking for something cheap,
cheap, cheap, not something collectible.
They will be repurposed as functioning components in a large rack-mount
project I'm working on.
Originally I was going to do this with a bunch of old PCs, but only
recently it occurred to me that using a bunch of say Wyse 50 terminals
would be a better solution.
I'm thinking someplace like a bank or whatnot that replaces all of its
serial terminals with PCs in an upgrade and dumps them all at once.
I see *tons* of palettes of VGA monitors these days, but rarely do I
see palettes of terminals and the onesy-twosy places are still
catering to a replacement market so they charge an arm and a leg.
Any ideas on how to find something like this? Or do I have to keep
waiting until noone is using terminals at all, not even in the 3rd
party market?
--
"The Direct3D Graphics Pipeline"-- code samples, sample chapter, FAQ:
<http://www.xmission.com/~legalize/book/>
Pilgrimage: Utah's annual demoparty
<http://pilgrimage.scene.org>
To be precise, i'd like to acquire :
- a pdp11/23 frontbezel (BA23).
- a rl02 terminator
- one rl02 cable
- a bit of qbus memory.
- boot proms for pdp11/34 rl02 combo.
I also have a RX02 outer shell to give away. ( Turns a rackmounted
RX02 into a deskmounted RX02 )
Also an empty BA23 with powersupply is avaliable.
Location : Switzerland / Holland / Belgium.
Jos Dreesen
I found the problem with my non-booting PDP-11. I feel incredibly
stupid so I thought I would share my findings and hope some of you
have done something equally dumb ;)
This morning I traced the BHALT L line to the KDF11-BA's edge
finger (AP1) and confirmed that it was indeed low all the time,
as I had earlier posted. Measured at the front panel it was still
low. So I flipped the HALT switch to the other (up) position and
sure enough the line went high. I toggled RESTART and the RUN
light came on. I heard a "bump" (nonprinting character) on the
teletype console but nothing else printed and then ODT came up at
173546.
Another look at the switch settings and turned off the turnkey
mode in favor of console dialog mode. Still just a nonprint
character at first, but after waiting a few more seconds, sure
enough "TESTING MEMORY" printed out. It took several minutes to
test the big Clearpoint board (I had miscounted the chips, it's
the maximum 4 MBytes/2 MWord) and then printed the correct "2044.
KW" followed by "START?" which is exactly what a KDF11-BA is
supposed to do!
:) :)
So the defective clock oscillator which seems to be working fine
with a 30 MHz replacement was problem 1. Incorrect switch settings
on two different versions of KDF11B manuals was #2. But the most
recent session of hair-pulling and teeth-gnashing was completely
my fault. (In case you haven't figured it out yet, I had been
setting the HALT switch in the halted position!!!) RTFM I guess :P
Now to fix the FAULT in the RL02 or RLV12 so I can boot from it! A
few seconds after entering "Y" to the "START?" prompt, ODT enters
at 173526 which is most likely because the controller is not
responding properly. Of course I don't know what's on the pack and
it may not be bootable... one step at a time.
-Charles
Has anyone tried the new NetBSD 3.0 on VAX yet? the 2.x series had a broken install (among other things), and took a bit to get running on my setup (3176), just wondering if v3/VAX had any big bugs
On Dec 31 2005, 19:32, Charles wrote:
> As I posted previously, the 26.667 MHz master clock oscillator had
> failed on the KDF11-BA cpu (probably from rough handling). For now
> I have a 30.000 MHz module from the junkbox. Looks like I spoke
> too soon (I had the J17-18 always-ODT jumper installed so seeing
> the ODT prompt was not a surprise). I don't know if this minimal
> overclocking is causing my current problems though:
10% is not minimal. It might be enough to make a difference.
> I have found two substantially different tables showing how to set
> the CPU DIPswitches. KDF11-B Maintenance Manual (MM), and KDF11-BA
> Users Manual (UM). The UM says I should have switches 1-8 set to:
>
> 1-On: CPU diagnostic
> 2-On: Memory diagnostic
> 3-Off: No DECNet boot
> 4-Off: Turn-key boot (sel. sw 5-8)
> 5-Off:
> 6-Off:
> 7-On: RL01/02 boot
> 8-Off:
>
> I don't have the MM handy, it was .TIFF pages, but for the same
> functions only switches 5 and 7 were On.
The switches are just mapped to a register that the boot ROMs -- or
indeed any other code -- can read. It's the Configuration and Display
Register (CDR) at 777524. It's nothing to do with microcode, nor is it
anything that directly affects the hardware.
The effect of the switches depends entirely on how they're interpreted
by the bootstrap code, and the description you list above is correct
for the original BDV11 bootstrap and for the early PDP-11/23plus
bootstrap (which was almost the same). It's not correct for the
microPDP-11/23 bootstraps.
The early microPDP-11/23 (KDF11-BE) bootstrap used switch 1-8 ON to set
up for ANSI VDU console terminal, and 1-7 ON to enable the quick memory
diagnostic. Usually 1-1 to 1-4 would also be on and 1-5 and 1-6 off,
to select the MSCP aiutoboot. All off would inhibit autoboot. All six
on would loop the self-test. There were 25 defined boot settings, and
37 reserved or unused.
If you tell us what ROMs you have on the board we can tell what
firmware version you have.
> with the RUN light off, state LED's=1111. Manual says 17 octal
> means the CPU is not in power-up mode 2, but J18-19 is correctly
> installed. I don't get any memory test messages or identifying
> text either, just the ODT prompt.
>
> According to the UM page 2-5, it looks like the internal boot
> address of 173000 is being generated correctly, but if BHALT L is
> being (incorrectly) asserted, the result is entry to ODT and a
> halt. Which matches what I see happening.
>
> If I set the front panel HALT switch and flip RESTART, the CPU
> immediately halts with state LED's=0001 which is correct. So it
> doesn't look like the HALT line is shorted to ground.
>
> Also, I can examine memory using ODT at the boot EPROM address of
> 773000 and read the following:
>
> 112737
> 000016
> 177524
> 000005
> 012700
> 000340
> 106400
> 012706
> 177524...
>
> I don't have a PDP-11 disassembler handy but that looks like some
> kind of executable code, hopefully the bootstrap.
Looks like bootstrap setup code. The first few words are
> 112737 MOVB #16, @#0177524 ; set low 4 bits of display reg
> 000016 ; this turns the LEDS off
> 177524
> 000005 RESET ; resets the bus and the MMU
> 012700 MOV #340, R0 ; set bits 5-7, which are interrupt
> 000340 ; priority in the PSW
> 106400 MTPS R0 ; set Processor Status Word
> 012706 MOV #177524, R6 ; prob. to read the config register
> 177524
Looks like an 11/23plus bootstrap, rather than, say, a microPDP-11/23
boot.
> When I examine memory at 173000 it's all 1's (177777) but I can
> deposit and read data correctly into locations there. Shouldn't
> the bootstrap program be copying its code there?
No copying involved. When you're using ODT, you use 18-bit addressing
(at least on this CPU), and 173000 then is simply the 8th bank of
memory (bank 7, counting from zero). 773000 is the I/O page, where the
bootstrap lives, and apparewntly you realised both those facts, but
perhaps didn't realise that when the CPU is running, any reference to
bank 7 (160000-177777) asserts the BBS7 (Bus Bank Select 7) signal so
when a program accesses 173000, it actually gets the boot ROM.
That's hardwired, in fact; it doesn't even use the MMU. In effect,
accessing the highest-addressable bank always gets the I/O page (this
is a slight oversimplification, because it depends on devices
recognising the BBS7 signal, but it will do for this discussion).
> Again, if the
> HALT line is being set for some reason, then the copy operation
> can't take place... is that where I should be looking or am I
> following a false trail?
False trail.
Start by double-checking all the jumpers, especially J16/17/18/19 (you
probably want J18-19 and nothing on 16 or 17). Check even the things
that should never have changed, eg that the test jumpers are all in the
correct places (J6-7, J8-9, J20-21, J34-35 not 33, J26-27 not 25).
Check there's nothing on J15, that J22/23/24 are set for whatever type
of ROM/EPROM you have, etc.
--
Pete Peter Turnbull
Network Manager
University of York
These all used standard cables. They have two separate 34-pin connectors
for two standard floppy cables (with the twist), two drives on each of the
two separate cables.
However, 3 of the 5 boards that I had are gone, sold to readers of this
list. I do still have two left. One 4-floppy only (8-bit ISA), one
4-floppy plus IDE (requires a 16-bit ISA slot).
*************
> If anyone wants one, I'll sell them for $12 each plus $6
> shipping.
Important for me would be a cable to go with these.
My understanding was the twisted cable worked only
for two-drive chains and for more than 2, you needed
to either strap the drives individually or make a very
specific cable.
John A.
Hi,
via eBay I got a small computer which I analyzed and
reverse engineered in the last months. I got quite far
and last week I came across an old thread in this group
initiated by William Maddox in nov 2003 where he mentioned
the unit:
"RAF Tornado Computer with Core Store Memory
... eBay-link cut out ...
A small airborne computer. From what look like
date codes on the components, it looks like it was
made in the early 80's, which seems a bit late for
this technology."
The seller had several of these units for sale. My
question is wether anyone reading this group has
probably acquired one of the units and is willing to
share parts and/or information?
Up to date I bulit a setup around the box consisting
of a logic analyzer connected to many vital signals.
A modified transputer board connected to a Sun Sparc
20 allows to read and write the core memory of the
small computer. The box is a 12-bit machine with
8K words of memory. It has a 13-bit program counter
and a 12bit accumulator register. Memory organisation
is similar to PDP8. The cycle time is 1.2us and
the complete memory of the box I have is functional.
In reverse engineerineering the command set I dis-
covered JUMP and a ADD command - So I am already able
to write very simple programs for the box.
But now lot of commands cause the CPU to freeze (even
a reset cannot restart it - one has to power off and
on again) and I cannot believe that such commands exist
in a computer of this type. Maybe there is a defect
located in the function-decode-board which contains
the microcode in several small PROMs. It would be
V E R Y helpful if one out there could at least
borrow me his boards for a crosscheck (I do only need
SK7 and above, not the core memory boards).
Regarding William Maddox's comment about the date
of the box: Regarding the architecture the box is
very similar to PDP8 but mine has been built after
6/82 with the power supply been changed after 1982.
This type of box was indeed developed for the
tornado but - as far as I was able to find out -
was not used. It might have been some kind of
prototype device. Serialnumber is <50. The boards
for core memory seem to be somewhat universal
and even older in design - maybe they have been
used in other devices, too...
Any hints are welcome,
best regards,
Erik, erik at baigar.de.
P.S. For pictures see
http://www.baigar.de/TornadoComputerUnit/
As I posted previously, the 26.667 MHz master clock oscillator had
failed on the KDF11-BA cpu (probably from rough handling). For now
I have a 30.000 MHz module from the junkbox. Looks like I spoke
too soon (I had the J17-18 always-ODT jumper installed so seeing
the ODT prompt was not a surprise). I don't know if this minimal
overclocking is causing my current problems though:
I have found two substantially different tables showing how to set
the CPU DIPswitches. KDF11-B Maintenance Manual (MM), and KDF11-BA
Users Manual (UM). The UM says I should have switches 1-8 set to:
1-On: CPU diagnostic
2-On: Memory diagnostic
3-Off: No DECNet boot
4-Off: Turn-key boot (sel. sw 5-8)
5-Off:
6-Off:
7-On: RL01/02 boot
8-Off:
I don't have the MM handy, it was .TIFF pages, but for the same
functions only switches 5 and 7 were On.
Anyway, using either table, the RUN light comes on briefly, then
ODT prints
173000
@
with the RUN light off, state LED's=1111. Manual says 17 octal
means the CPU is not in power-up mode 2, but J18-19 is correctly
installed. I don't get any memory test messages or identifying
text either, just the ODT prompt.
According to the UM page 2-5, it looks like the internal boot
address of 173000 is being generated correctly, but if BHALT L is
being (incorrectly) asserted, the result is entry to ODT and a
halt. Which matches what I see happening.
If I set the front panel HALT switch and flip RESTART, the CPU
immediately halts with state LED's=0001 which is correct. So it
doesn't look like the HALT line is shorted to ground.
Also, I can examine memory using ODT at the boot EPROM address of
773000 and read the following:
112737
000016
177524
000005
012700
000340
106400
012706
177524...
I don't have a PDP-11 disassembler handy but that looks like some
kind of executable code, hopefully the bootstrap.
When I examine memory at 173000 it's all 1's (177777) but I can
deposit and read data correctly into locations there. Shouldn't
the bootstrap program be copying its code there? Again, if the
HALT line is being set for some reason, then the copy operation
can't take place... is that where I should be looking or am I
following a false trail?
Any help greatly appreciated.
thanks
Charles
