>From: shoppa_classiccmp at trailing-edge.com
>
>> also must have done a bitslice designs at one time or another
>
>I always thought of the 8x300 as a near-bitslice processor... bipolar,
>data port, etc. While it doesn't chain together to make bigger
>wordsizes like AMD2901/Intel 3002, it really was a programmable
>sequencer very much like those bitslice parts.
>
>Tim.
>
Hi
With the way it had rotates and masking through th I/O bus,
I could see how one could sequentially chain several processors
with only a cycle per processor delay.
Dwight
>From: "Jim Battle" <frustum at pacbell.net>
>
>Dwight K. Elvey wrote:
>...
>> Hi
>> The last place I worked, the processor was designed to
>> be able to optimize by doing out of order execution ( HaL
>> computer system, first Sparc64 ). They soon discovered the
>> problem when dealing with I/O. They, luckily, had a
>> sequential mode that they could switch to during I/O
>> operations that made the order predictable. You'd have
>> thought that someone in the design team might have realized
>> the problem.
>> Dwight
>
>Dwight, I'm more than a little sceptical that the architects at Hal
>didn't understand that reordering memory accesses would cause problems
>with programmed I/O. I'm sure that they put in instruction
>serialization and memory barrier instructions for precisely those
>reasons. It wasn't a matter of "luckily" at all.
The sequential mode was for boot ( and I/O ). I suspect that
the original architects understood the need but a hole team of
software fellows had no idea what was wrong. Trust me on this,
I was there and went to the debug meetings.
>
>Even before OOO (out of order) execution at the instruction level was
>practical in the 90s, there were designs that performed memory access
>reordering since the 60s, leading to some of the same issues.
>
>As a side note, I believe the first company to attempt (thought they
>didn't execute) real out of order instruction execution was Metaflow.
>Some have said that Metaflow's architectects (Bruce Lightner primarily)
>were ahead of their time, but the hallmark of good engineering is having
>the judgement to specifify something that can be built within
>constraints of practicality, not just specifying something with all the
>cool ideas you can come up with.
It would look ahead to see if it could execute anything that wasn't
dependent on something that needed a current pending calculation
or something that wasn't already in cache. Because it is a memory
mapped I/O, it didn't treat the I/O and different then data.
Dwight
Hrmm... I think maybe, =MAYBE= I can schedule a =TEMPORARY=
intervention on this. I have kin in Reno, NV, which is only about 40
minutes off. What are the dimensions on a thing like this?
Approximate weight?
-dhbarr.
On 5/14/05, Zane H. Healy <healyzh at aracnet.com> wrote:
> At 10:06 AM +0200 5/14/05, Jochen Kunz wrote:
> >On Fri, 13 May 2005 23:23:53 -0400 (EDT)
> >John Lawson <jpl15 at panix.com> wrote:
> >
> >> There is a fee DPS-6 in Carson City, Nevada, that is going to have to
> >> be reduced to scrap, unless someone can step up to the plate
> >Isn't a DPS-6 capable of running Multics?
>
> No, that would be select DPS-8 models. The DPS-6 is basically a
> Minicomputer. It runs GCOS-6 and maybe other OS's.
>
> Someone *really* needs to save this system. It can't be me for
> multiple reasons. These systems are *VERY, VERY* rare to find in
> Hobbyist hands. Since this is the system that Sellam had, I think
> there is only one, maybe two, other systems in Hobbyist hands.
>
> Zane
> --
> --
> | Zane H. Healy | UNIX Systems Administrator |
> | healyzh at aracnet.com (primary) | OpenVMS Enthusiast |
> | | Classic Computer Collector |
> +----------------------------------+----------------------------+
> | Empire of the Petal Throne and Traveller Role Playing, |
> | PDP-10 Emulation and Zane's Computer Museum. |
> | http://www.aracnet.com/~healyzh/ |
>
In the next two weeks, we must dispose of the Honeywell DPS-6 mainframe -
somehow. So far two possiblities have fallen through.
Therefore, be it Known to All by these Presentments:
There is a fee DPS-6 in Carson City, Nevada, that is going to have to be
reduced to scrap, unless someone can step up to the plate, as they say,
and speak those rare words: "I'll take that..."
System will fit in a std-sized pick-up truck, forklift and loading
assistance is provided.
Sombody adopt this machine before we are forced to KILL it.
Cheers
(Hopefully Not The Grim Computer Reaper) John
>Sorry to belabor the point, but...
>
>This is the part that I can't find in my C documentation. I get that there
>are multiple assignments before the sequence point, whose order is
>"unspecified". But can't find anything that says the result should be
>"undefined", so I assume it should be one of the values (but which one would
>still be "unspecified").
If it were just a matter of assignments, I might agree with you, however in
this particular case, the code contains three read-modify-write operations on
the same Lvalue all of which occur within the context of side effects within
a single sequence interval. IIRC the behavior in this instance is undefined.
>Then again, I am working from the lexical guide, rather than the standards
>documents themselves. (Can you cite chapter and verse?)
Sorry, I'm operating from memory - haven't got a clue where my copy is at the
moment (haven't had to make major changes to my compiler in quite a long time).
Here is a reference to a C faq page which cites an example exactly like the
code in this discussion, with references to K&R, ANSI and ISO documents:
http://www.eskimo.com/~scs/C-faq/q3.2.html
Regards,
Dave
--
dave04a (at) Dave Dunfield
dunfield (dot) Firmware development services & tools: www.dunfield.com
com Collector of vintage computing equipment:
http://www.parse.com/~ddunfield/museum/index.html
I have a few PDP series/DEC Prototyping cards. Anybody interested? Will scan a picture for you. Bill
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>> Although the nasal demon theory has been around for a long time, I
>> am certain that this will not be the result here - not of my machines
>> are fitted with appropriate I/O hardware to cause this - but as was
>
>Assuming you're running on machines more modern than the sort of stuff I
>use, I can't believe you've got real technical and/or service manuals for
>the hardware. In which case, you can't be _sure_ there's not a nasal
>demon generator hidden in one of the ASICs.
>
>[:-) of course]
While it's entirely possible that such a device exists in the "black boxes",
my point is that all of my machines lack the physical delivery channel
to conduct the demons to the nazal outlet, so I think the worst that ever
happens is having them ejected from a ventalation opening or disk slot within
the unit itself ... (sometimes when I've been coding long enough in one
stretch I have observed this!)
On the other hand, I am absolutely convinced that the microsloth software
in these boxes has deeply embedded simulation and virtualization of demons
of all kinds, nazal and otherwise - but thats a whole n'other discussion,
and none of the truly possessed boxes are old enough to really qualify for
discussion on this list.
Cheers,
Dave
--
dave04a (at) Dave Dunfield
dunfield (dot) Firmware development services & tools: www.dunfield.com
com Collector of vintage computing equipment:
http://www.parse.com/~ddunfield/museum/index.html
OK... now that I have the GPS issue squared away, I have one final
Palm query - does anyone on the list have a box of dead Palms or Palm
parts. I am specifically interested in the SIMMs from Palm IIIs and
older. I have a U.S. Robotics 512K Palm w/PalmOS 2.0 in ROM, and a
1MB IBM WorkPad w/PalmOS 2.0.3 in ROM, and I would like to use them
with more modern apps that depend on the serial port, thus I need at
least a 3.0 SIMM. The ones in a Palm III are perfect - partially
because they have 2MB of RAM, and partially because they typically
have PalmOS 3.0 in FlashROM.
Palms with dead screens would make nice donors, if anyone has such
things lying around. If not, perhaps I'll find some bits at Dayton,
but people usually only bring working ones, and I really am looking
for parts to take presently working ones and make them into _useful_
ones.
The three things I most need to run are a VT100 emulator, PalmORB, and
a GPS app - all serial-dependent apps.
Please write me off-list if you happen to have a small box of dead
Palms of any variety.
Thanks,
-ethan
>>> Is there any reason why the BASIC subroutine stack has
>>> to be the processor hardware stack?
>> There is no rule, just that it was fast so why not?
> Because, IIRC, the 6502 stack is only 256 bytes long.
You really have to try hard to get a 6502 BASIC interpreter
to use more than 20 or so bytes of the stack purely for
interpreter code calls, so why not use it for the interpreted
code as well?
Lee.
.
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