Anyone have any info on a NEC PC-6001A? It has what looks like a
cartdrige or expansion port on the side and 2 joystick ports on the
other side. Along the rear are printer, tape, audio out, rf out,
video out and a volume control. Looks like it has a place for an
optional RS-232 port but this one doesn't have it.
Any info on this machine would be welcome; cpu, os, etc. Also, if
someone knows the pin outs for the printer and tape ports, that would
be helpful too.
Thanks.
-----
David Williams - Computer Packrat
dlw(a)trailingedge.com
http://www.trailingedge.com
<> The PDP-11 architecture has only 7 GP registers (since you can't really
<> the PC for just anything) but that's good for the times, and they reall
<> are interchangable, so I'd be willing to argue that it wins on that.
<
<I'm glad somebody agrees with me on that! IMHO the concept of a GP
<register is a RISC sort of thing. And, Allison, if you think RISC
<should be register-rich, I claim the PDP11 was for its date, and
<certainly was compared to micros of the 1970s.
Compared to maybe 6800 or 6502, the 8080 had 4 16bit registers (bc, de,
hl, sp). The z80 added a second set and IX/IY. But that was only one
aspect.
On the instructions RISC systems of the time and even later didn't have
the addressing modes and often had a distinct register load and store
instruction. The best example of that difference was an ADD (R1),@(r2)+.
Now compare that to the DG Nova and it is of a stark difference.
Of all the micros in my collection, none are RISC save for the PDP-8 and
6502 which in my mind come close.
I have: 1802, SC/MP, 6800, 6809, NEC D78PG11, 8748/9, 8751, 8080/8085,
z80, z180, z280, z8002, z8001, 808x, 8018x, 80286, 80386, 80486 and the
micro version of minis 6100(pdp-8), 6120(PDP-8+EMA) TI9900, PDP11(T-11,
F11, J-11).
Now something with a MIPS chip, ARM, sparc or some such would be a great
addition of a real RISC processor.
<I don't like the "one instruction per cycle" definition of RISC - for a s
<what is a cycle? I prefer to think of RISC as an "every cycle is sacred"
<philosophy - you don't waste cycles. I'd try to get _memory cycles_ as o
<as the hardware permits them - on the 6502, for example, one per cycle (a
<almost manages it!), on 8080/Z80/PDP one every two or three cycles - but
<wouldn't make them all instruction fetches!
Again the -11 fails on that definition. Typical instruction are several
clocks per cycle and several cycles per instruction. Now the Z280
approaches that at the bus level as it has a internal cache and pipline
but, the instruction set is non-risc.
<Except the early ones. Allison, are you sure it was the 11/05? I claim
<it was the 11/15 (I have an 05). However I will concede that 05 may
<have at one time been a name for an 11/20 variant.
It may have been the 15.
I'm not saying RISC is bad only that the PDP-11 is not RISC.
Allison
OK, Now I can make myself an rsx11m.sys, VMR is, BOOt it, but when I say
SAV, it runs for awhile, types "CAN'T FIND HOME BLOCK", and halts.
It also complains about having to reduce partitions to the soze of the
common area (?), and the TT: driver is bigger than 4K.
What've I done? I just switched DY and DL in the sysvmr.cmd file,
and removed DU (The driver is corrupted...)
-------
[PDP11 risc or cisc]
Pete Turnbull:
> I know that was directed at Allison, but I'd say that key features of RISC
> architectures include large numbers of general registers,
> one-instruction-per-cycle, and hardware decode rather than microcode, not
> just the obvious minimised instruction set.
>
> The PDP-11 architecture has only 7 GP registers (since you can't really use
> the PC for just anything) but that's good for the times, and they really
> are interchangable, so I'd be willing to argue that it wins on that.
I'm glad somebody agrees with me on that! IMHO the concept of a GP
register is a RISC sort of thing. And, Allison, if you think RISC
should be register-rich, I claim the PDP11 was for its date, and
certainly was compared to micros of the 1970s.
> It loses on the one-instruction-per-cycle, though. Instructions take vastly
> different amounts of time to execute, depending on what they are, and
> they're all several cycles long. Just think about the FP instructions, or
Yeeeeesss...
I don't like the "one instruction per cycle" definition of RISC - for a start,
what is a cycle? I prefer to think of RISC as an "every cycle is sacred"
philosophy - you don't waste cycles. I'd try to get _memory cycles_ as often
as the hardware permits them - on the 6502, for example, one per cycle (and it
almost manages it!), on 8080/Z80/PDP one every two or three cycles - but I
wouldn't make them all instruction fetches!
> the Commercial Instruction Set. That's not the most CISC thing you've ever
> seen? :-) At a more mundane level, the additions of instructions like ASH
Despite having a 11/44, I have never seen a Commercial instruction Set :-)
> is pretty CISC -- in fact the whole idea of extending the instruction set by
> altering or adding to microcode is the essence of CISC, and the antithesis
> of a Reduced Instruction Set Computer.
Agreed. Later PDPs were more CISC, and this reached its maximum in the
Vax. But the basic architecture is IMHO a risc one - very simple and
very powerful.
> And of course it loses on the microcode vs hardware decode.
Except the early ones. Allison, are you sure it was the 11/05? I claim
it was the 11/15 (I have an 05). However I will concede that 05 may
have at one time been a name for an 11/20 variant.
> Similar, but in many ways quite different. I just had this argument (from
> a somewhat different point of view) on another mailing list. The 68K is
> much more like a PDP-11 than anything else, but it has a lot of clutter
> added.
Fair enough.
> That's my third of a tanner.
:-)
Philip.
PS I shall try and refrain from further comment on this issue - I don't
want to be the one who started a RISC versus CISC flame war!
<The PDP-11 architecture has only 7 GP registers (since you can't really u
<the PC for just anything) but that's good for the times, and they really
Really, you can do things to the PC that most micros don't even have
instructions for. there are four addressing modes of not for the PC
immediate, absolute, relative and relative defered which when applied
to a any other register are autoincrement, autoincrement defered,
indexed and indexed defered. That distinction is quite powerful and
only some of that is available in many micros and generally distinct
instructions. Most micros have a data follows instruction (immediate)
and an address follows instruction (absolute) but the other two are
far less commonly implemented.
The biggest non-risc is the addressing modes some are impossible for most
risc machines. The two operand addresses uncommon to RISC and most
micros. Add to it the defered mode (register contains the address of
a word in ram that contains the address of an operand). That impacts
compiler complexity and code density.
<And of course it loses on the microcode vs hardware decode.
Oops. The chip versions are microcoded as was the 11/60 but I believe
the 11/05 and 11/20 were hardware decode.
Allison
><>fits in the primary cache of an Alpha. If possible, you'd be using the
><Alpha
><>essentially as a programmable microengine and programming it to be
><PDP-11.
><>The reason to fit it in the primary cache is because of how the Alpha
><boots;
>
>Huh? a PDP11 emulator for alpha would be written as PAL to get the best
>results. Caching it is pointless as it's still a 16bit machine and
>would still flog itself to death trying to manage a data file greater
>than fits in ram (4mb max on PDP11 and some of that would be code!).
You misunderstand. I'm not talking about caching any PDP-11 code or data,
just the Alpha code which executes the emulator. Any memory fetch which
fetches Alpha code is overhead; a real PDP-11 wouldn't have to make that
memory fetch. If you can build a PDP-11 emulator small enough to fit in the
primary cache, all of your memory fetches can be payload.
It wouldn't really be PAL code because it would be executing in the chip's
boot environment; loaded from SROM into primary cache and staying there.
It owuld have a lot of the characteristics of PALcode; the extra registers
which Palcode depends upon would be visible, the MMU would be off, etc., but
it wouldn't really be PALcode because it wouldn't be called by a PAL trap.
Roger Ivie
ivie(a)cc.usu.edu
> Competing against the mostly 16bit 8088/6 and the 286 the PDP11 was out
> front. To match a 16bit cpu against a 32bitter... you must be inhaling!
FWIW, it's been my experience that on problems small enough to be tackled
by the J-11, an 18MHz J-11 eats the VAX-11/780 for lunch.
Roger Ivie
ivie(a)cc.usu.edu
Can anyone here help them out? Please respond to them and not me.
Thanks.
-----
Date sent: Thu, 23 Apr 1998 14:37:31 -0400
From: Liz Huntley <lizh(a)cannet.com>
Subject: Laser, Pal286
A question if don't you mind?
I'm tinkering with a Laser, Pal286. A customer of mine uses it, it had
a HDD Controller Failure. It actually works pretty well when it's
working. I don't suppose you know where I could get a working
motherboard for it... which I'm guessing that it needs.
I appreciate any info.
Thanks, Liz Huntley
| o_ | \ _ _ o _ ._ _ Liz Huntley
|_|/_ |_/(/__> |(_|| |_> lizh(a)cannet.com
_| Canton, Ohio
-----
David Williams - Computer Packrat
dlw(a)trailingedge.com
http://www.trailingedge.com
On Apr 23, 13:14, Philip.Belben(a)powertech.co.uk wrote:
> First, thanks to Pete, Allison and others for explaining the PDP11-23
> stuff. I stand corrected, I suppose.
I just like to show off :-)
> A long running discussion. Allison, I don't understand how you can say
> that the PDP11, with its very simple instruction set, is _more_ CISC
> than (say) the 80286, with which you compare it here. To my mind the
> only really CISC feature of the PDP11 is the MARK instruction. I fear
> we may be talking at cross purposes, and may mean different things by
> RISC and CISC - could you give some specific examples, please?
I know that was directed at Allison, but I'd say that key features of RISC
architectures include large numbers of general registers,
one-instruction-per-cycle, and hardware decode rather than microcode, not
just the obvious minimised instruction set.
The PDP-11 architecture has only 7 GP registers (since you can't really use
the PC for just anything) but that's good for the times, and they really
are interchangable, so I'd be willing to argue that it wins on that.
It loses on the one-instruction-per-cycle, though. Instructions take
vastly different amounts of time to execute, depending on what they are,
and they're all several cycles long. Just think about the FP instructions,
or the Commercial Instruction Set. That's not the most CISC thing you've
ever seen? :-) At a more mundane level, the additions of instructions
like ASH is pretty CISC -- in fact the whole idea of extending the
instruction set by altering or adding to microcode is the essence of CISC,
and the antithesis of a Reduced Instruction Set Computer.
And of course it loses on the microcode vs hardware decode.
> For those who think a souped up PDP11 could be a pentium killer, bear in
> mind that there was a 32 bit PDP11. I don't mean the VAX, and I don't
> mean the PDP11-68: I mean the Motorola 68000. AFAICT the two
> architectures are very, very similar. Is it a Pentium killer? The
> 68070 might have been but it's rather faded away now...
Similar, but in many ways quite different. I just had this argument (from
a somewhat different point of view) on another mailing list. The 68K is
much more like a PDP-11 than anything else, but it has a lot of clutter
added.
That's my third of a tanner.
--
Pete Peter Turnbull
Dept. of Computer Science
University of York
<Allison Parent wrote:
<
<> Competing against the mostly 16bit 8088/6 and the 286 the PDP11 was out
<> front. To match a 16bit cpu against a 32bitter... you must be inhaling
<
<A long running discussion. Allison, I don't understand how you can say
<that the PDP11, with its very simple instruction set, is _more_ CISC
<than (say) the 80286, with which you compare it here. To my mind the
<only really CISC feature of the PDP11 is the MARK instruction. I fear
<we may be talking at cross purposes, and may mean different things by
<RISC and CISC - could you give some specific examples, please?
The CISC features are in the use of general registers (no specific
accumulator) and a huge assortment of addressing modes in many cases
featuring two operand addresses. Most micros are either single address,
primary accumulator and loaded with specific registers. Think of one
micro that would permit PC relative addressing and stack relative. I
happen to know two but they are not common.
Compared to most RISC machines the PDP-11 is very CISC. Also at the
time of the PDP-11 RISC had a specific definition that the -11 clearly
didn't come close to. The definition of the era was all instruction
would execute in 1 to to clocks, register rich and very simple
instructions fast instructions compared to complex many clocks to execute
instructions. The idea of auto index deferred (*x++) is not a RISC concept
as it's far to complex to execute in one or two clocks(minimum of two to
three memory reads and one write).
Opinion: PDP-11 of all 16bit machines of wide spread use was the best
suited for C programming or FORTH due to it's stack archecture and
addressing modes. The only 16 bit machines that can beat it for code
density are a few of the byte instruction oriented machines using far
larger and more complex compilers.
<For those who think a souped up PDP11 could be a pentium killer, bear in
<mind that there was a 32 bit PDP11. I don't mean the VAX, and I don't
<mean the PDP11-68: I mean the Motorola 68000. AFAICT the two
<architectures are very, very similar. Is it a Pentium killer? The
<68070 might have been but it's rather faded away now...
Sorry, the moto is similar in that it borrows some concepts. It lacks
the general resgister archecture, misses the idea of orthoginality and
is a primary accumulator machine. It's at best PDP-11 on bad acid. It
could be a pentium killer as the 680xx was a 32bit machine from day 0.
The VAX is the closest machine to the PDP-11 in general archecture and
instruction set of the lot. I has has compete for years against the X86
machines for a number of years not by surperfast clock numbers but the
ability to manage memory and large numbers of users. The VAX 7000m7xx
series with the NVAX-5(circa 1994) chip was already killing anything
Intel would produce for a few years. People are not junking 7000series
machines over Pentium yet!
A far closer machine is the NS16032, still 32bits but borrows more on
PDP-11 and VAX then moto did.
Even the z8000 was more like PDP-11 than MOTO! It did keep the registers
more or less general, had most of the addressing modes and most all were
applicable to the general registers.
In the intel race there can be lots of competitors as some of the "big
box" systems have far better IO and DISK systems than are married to
most pentium class machines. In the end if you munging gigabyte data
bases raw cpu speed is only a partial solution if your waiting for the
disk!
Allison
On Apr 23, 5:52, Daniel A. Seagraves wrote:
> Subject: More RSX weirdness...
> Last night I stared at the halted 83 for a while.
> RSX-11M V4.1 BL35C 256.K MAPPED
> SAV -- Cannot find home block
>
> Then it smacked me like a ton of bricks: The high 4K of a PDP-11 is I/O space!
> I had 252K or RAM! So, I rebuilt RSX11M.SYS that way. It worked.
> I was able to hardware-boot the RL02.
> So, I reinstalled my RQDX3, loaded RT-11, said COPY DL0:/device RSX11M.DSK/file
> to make an image, Kermitted it to the PC (2:30 transfer time!) and loaded it
> into the emulator. Now, with the Supnik emulator set for 2M or RAM (Just like
> the 83...), I'm staring at the same screen, while booting. SAV can't find
> the home block. Same thing for E-11. But everything works just fine from
> the hardware.
Well, I'm at a loss as far as the emulators are concerned. I've used them
precisely once, and that was only with RT-11. I'm glad you got the rest working,
though, and I hope my imperfect memories helped rather than confused.
> Oh, and it says most of the TTs and the DU don't exist while
> booting. Which makes sense, they don't...
That might mean you can't use them at all. For some devices, if RSX can't find
the hardware during the boot, it disables the driver. There may be some clever
way to persuade it to re-enable them if you need to, but I don't know. So I
hope you mean that those devices really aren't physically present!
--
Pete Peter Turnbull
Dept. of Computer Science
University of York
I haven't got time to type loads of messages. These are in a roughly
random order.
First, thanks to Pete, Allison and others for explaining the PDP11-23
stuff. I stand corrected, I suppose.
Tony Duell wrote:
> BTW, does anyone know the position on reverse-engineered schematics? Who
> owns the copyright on those? The original company, the person/company
> who drew them out, what? Or are they just plain illegal (I doubt the
> latter, as I've seen them advertised as such for devices where original
> manufacturer's manuals are not available).
AFAIK, you both do. You own the copyright in the diagram you've drawn
out, and the original designer/manufacturer owns the copyright in the
circuit it represents. So if I want to copy it I need permission both
>from you and from the designer. (It's like if I want to photocopy a
book I need permission from both the author and the publisher.)
Allison Parent wrote:
> Competing against the mostly 16bit 8088/6 and the 286 the PDP11 was out
> front. To match a 16bit cpu against a 32bitter... you must be inhaling!
A long running discussion. Allison, I don't understand how you can say
that the PDP11, with its very simple instruction set, is _more_ CISC
than (say) the 80286, with which you compare it here. To my mind the
only really CISC feature of the PDP11 is the MARK instruction. I fear
we may be talking at cross purposes, and may mean different things by
RISC and CISC - could you give some specific examples, please?
For those who think a souped up PDP11 could be a pentium killer, bear in
mind that there was a 32 bit PDP11. I don't mean the VAX, and I don't
mean the PDP11-68: I mean the Motorola 68000. AFAICT the two
architectures are very, very similar. Is it a Pentium killer? The
68070 might have been but it's rather faded away now...
Just my half groat's worth again!
(Yes, Tony, half a groat == tuppence == two pence == two pennies = (in
some sense) $0.02, which seems to be the value most people set on their
opinions here. About right in most cases (no offence intended))
Philip.
On Apr 22, 19:50, Daniel A. Seagraves wrote:
> Subject: Another RSX good one,,,
> OK, Now I can make myself an rsx11m.sys, VMR is, BOOt it, but when I
say
> SAV, it runs for awhile, types "CAN'T FIND HOME BLOCK", and halts.
Hmmmm... What are you trying to SAV this onto? The message means just
what it says. Sounds like you have an unformatted disk, or a disk error,
which might be due to corruption, or a hardware fault, or the disk isn't
online and writable, or you mistyped the disk specifier. What was the
prompt you got just before you typed SAV?
> It also complains about having to reduce partitions to the soze of the
> common area (?),
"VMR -- Partition reduced to executive common size", yes? This is just
for information. It's telling you that VMR has just installed an
executive common block in the appropriate partition, and eliminated some
unused space at the top of the partition. Executive is RSX-speak for
what unix buffs call the kernel, and what some other OSs refer to as the
monitor. A common block is a shared area, ie one that's not duplicated
for multiple instantiations of <whatever>.
> and the TT: driver is bigger than 4K.
That's just informative, not normally a problem. The RSX TT: driver is
quite big if it has many options enabled, and this is a common message.
> What've I done? I just switched DY and DL in the sysvmr.cmd file,
> and removed DU (The driver is corrupted...)
> -------
--
Pete Peter Turnbull
Dept. of Computer Science
University of York
Last night I stared at the halted 83 for a while.
RSX-11M V4.1 BL35C 256.K MAPPED
SAV -- Cannot find home block
Then it smacked me like a ton of bricks: The high 4K of a PDP-11 is I/O space!
I had 252K or RAM! So, I rebuilt RSX11M.SYS that way. It worked.
I was able to hardware-boot the RL02.
So, I reinstalled my RQDX3, loaded RT-11, said COPY DL0:/device RSX11M.DSK/file
to make an image, Kermitted it to the PC (2:30 transfer time!) and loaded it
into the emulator. Now, with the Supnik emulator set for 2M or RAM (Just like
the 83...), I'm staring at the same screen, while booting. SAV can't find
the home block. Same thing for E-11. But everything works just fine from
the hardware. Oh, and it says most of the TTs and the DU don't exist while
booting. Which makes sense, they don't...
-------
I received this email, if any one in Australia is interested contact
the party below, not me.
--------------------
Date sent: Thu, 23 Apr 1998 14:59:51 +1000
From: Alex Roche <alexr(a)amfac.com.au>
Organization: Amfac Pty Ltd
Subject: Honeywell Bull
Hi,
I have a Honeywell Bull X-Superstream.
Know any one in Sydney Australia (where I am) or elsewhere who wants
to buy one for a song?
Alex Roche
-----
David Williams - Computer Packrat
dlw(a)trailingedge.com
http://www.trailingedge.com
<> used to'. Now, admittedly you don't generally see the schematics of a
<> microprocesor (although I have understood minis to gate level), but
<> there's nothing magic about a CPU.
I have and they are really strange as many use dynamic storage cells
for registers and the like.
I did my EE training in the early 70s and computer meant the DEC-10,
PDP-8 or the S370s behind glass. I was doing mostly analog stuff in
the labs till I started squawking. They had be blinking neon lights
and to pay tuition I was designing 4cx250 pushpull amps at 460mhz and
my own UHF frequency counter. Before I'd left that I was doing 8008
designs and they were talking sequential logic.
To this day my favorite two programming languages are solder and
assembler.
Allison
At 05:56 PM 4/17/98 -0500, you wrote:
>I think I have other text convertors stashed that change a text file into
"jive",
>"valley girl" and yet another I can't think of right now for some reason.
It might
There is also chef-erizer (or something like that) that converts text into
"swedish" a la the Swedish Chef from the Muppets.
--------------------------------------------------------------------- O-
Uncle Roger "There is pleasure pure in being mad
roger(a)sinasohn.com that none but madmen know."
Roger Louis Sinasohn & Associates
San Francisco, California http://www.sinasohn.com/
Okay, I'm way behind, but...
At 01:46 PM 4/15/98 -0500, you wrote:
>As it is the plant that cranked out most of the red
>army's tubes is still in use as a commercial tube plant, named SovTek.
They do
>make a hell of a tube but I don't think it's of much use for a PC.
Yes, SovTek still makes a lot of tubes, and they're available here in teh
US if you really want to build yourself a Tube-based computer. However,
most people are using them music amplifiers these days.
--------------------------------------------------------------------- O-
Uncle Roger "There is pleasure pure in being mad
roger(a)sinasohn.com that none but madmen know."
Roger Louis Sinasohn & Associates
San Francisco, California http://www.sinasohn.com/
I picked up a C-128D this morning and need a monitor for it. As this is
my first Commodore, I have a couple of questions. Is the RGBI port on
the rear panel the same as RGB as in IMB CGA? Where might I find a CBM
1902 monitor? Were there any 1902 compatible monitors produced by
anyine else?
I only picked this one up because I wanted a machine that would rum
CP/M. It came with CP/M 3.0 boot disks and manuals.
Thanks'
James
I was wondering if anyone knew the particulars about the PS/2 SCSI
external connector on the model 80 server I have. It appears to be a
miniature high density 60 pin connector, This is totally different than
the standard SCSI 2 or 3 connections that I've seen. Is there an adapter
available to be able to hook it to a standard SCSI I, II or III
cable/connector? I want to be able to use my CDROM towers with it if
possible.
--------------------------------------------------------------------
Russ Blakeman
RB Custom Services / Rt. 1 Box 62E / Harned, KY USA 40144
Phone: (502) 756-1749 Data/Fax:(502) 756-6991
Email: rhblake(a)bbtel.com or rhblake(a)bigfoot.com
Website: http://members.tripod.com/~RHBLAKE/
ICQ UIN #1714857
AOL Instant Messenger "RHBLAKEMAN"
* Parts/Service/Upgrades and more for MOST Computers*
--------------------------------------------------------------------
On Apr 23, 0:57, Tony Duell wrote:
> Indeed. What's worrying is how few people spotted it :-)
>
> When I started in computing all those years ago, I was told 'Don't worry
> about the CPU. It's just a pile of gates and flip-flops like the one's you're
> used to'. Now, admittedly you don't generally see the schematics of a
> microprocesor (although I have understood minis to gate level), but
> there's nothing magic about a CPU.
Agreed. We don't have much on the innards of CPUs at gate level but there's a
1st year course on basic architectures (lots of PDP-11 and -10, IBM, and M68K
stuff), a 2nd year course that teaches about bigger building blocks (pipelines,
ALUs, register banks, cache, etc), and third year stuff on different
architectures (mostly parallel architectures). Everybody has to do the basic
electronic logic course which runs all year in 1st year.
> I hate to say this, but you can't learn this in a couple of practicals.
> Just as you can't learn programming that way. You have to _play_ - build
> circuits, write programs - and keep on at it..
True, but a lot of people just aren't interested. Nevertheless, our first year
course starts with basic gates and has something like 18 or 20 practical
exercises, from investigating glitches in a SPICE model of a NAND gate, to a
traffic light sequencer, a model RAM, a digital die using a PAL, and a few
other things I've forgotten. And everybody has to do it, not just the hardware
buffs.
One of the most popular courses is the 2nd-year follow-up, in which students
are given a problem to solve involving breadboarding a small Z80 system
(CPU/ROM/RAM/LCD/glue + whatever analogue stuff is required). The problem is
different every year, and there's no formal tuition. You can ask the lecturer
or demonstrators any questions you like, and you'll get the answers, but you
have to learn yourself. You don't get taught (in the conventional way).
--
Pete Peter Turnbull
Dept. of Computer Science
University of York
Well, folks, it looks like I lied in my recent post about not having
a PDP-11.
Actually, I _do_ have one. I simply forgot that I had, stashed
away, an 11/23 CPU and some boards ("common as houseflies" was the
term Allison used? :> ) Since it was not in a rack, and since
the pieces have never been assembled, and since I have no disks for
it, I pretty much forgot about it, and I've never had it working.
But it appears I have a fairly nice, complete system, board-wise.
Here's what I have:
-----
Chassis: DBA11-N
Cards:
1. M8186 (KDF11-AA) 11/23 CPU with KTF11-AA (MMU), sockets for FP11
2. M8047-CA (MXV11-AC) 16-Kword RAM, 2 async EIA SLU, w/ 2 24-pin ROMs
3. M8047-CA (MXV11-AC) 16-Kword RAM, 2 async EIA SLU, sockets for ROMs
4. M8044-DB (MSV11-DD) 32-Kword 16-bit MOS RAM
5. M8044-DC (MSV11-DD) 32-Kword 16-bit MOS RAM
6. M7269 (RKV11) RK05 controller
7. Data Systems Design 818836-01 REV B -- RX01, RX02, or RX50 controller??
(25-pin ribbon-cable connector)
-----
So, in order to get this whole thing working again, I have a
WHOLE SLEW of questions to ask folks, in no particular order.
Here goes.
1) The M8047-CA boards need to be wire-wrapped to assign their
address vectors -- they're combination MOS RAM and Async EIA,
and I have no docs for them. Can anyone guide me to some info,
or tell me how to jumper one of them to be console serial
port, and the other to be next in line on the bus?
The wire-wrap pins have absolutely no markings on them, not
even any single-letter or number labels, so this one could
require ASCII-art to describe :)
2) Same as above, but for the M8044-DB boards. I could put one
of these in with the M8047's to get a full 64Kword of RAM, yes?
Does anyone know what the DIP-switch settings for these boards
are?
3) I'd love to have the RK05 controller in there, in the hopes
that someday I'll have an RK05 to play with. Just like the
above... How do I jumper it, and where (physically) in the
Bus should I put it?
4) Actually, that raises a good question. All of these boards
are single-height (1/2 the width of the Q-bus backplane).
I know there is some special physical layout the boards should
use when they populate the backplane, but what is it?
My best (probably wrong) guess right now is:
CPU in row 1, slot 1 (is that left or right?),
M8047's in row 2, slots 1 and 2,
M8044 in row 3, slot 1,
M7269 in row 4, slot 1, DSD controller in row 4, slot 2.
Does that make any sense? Should the CPU only live in the
first row, not RAM? I seem to remember something like this
from the darkest depths of my mind, but I don't remember
for sure.
5) OK, simple question, one I've wondered about but never bothered
getting answered because I felt like a complete idiot moron
asking it: Does the QBUS need to be terminated by a special
card in any way, in order to work?
6) What's the pin-out on the M8047 EIA ports? They're 9-pin Berg
connectors, and I need to build a cable for them to connect
either to 9-pin or 25-pin PC-style serial in order to set up
any kind of console terminal.
7) Anyone know what the Data Systems Design board is? It has
"RX" stensiled onto the board near the jumper block, among
other things like "BOOT", so I assume it's some sort of RX01
or RX50 controller or some such.
WHEW, that's _too_ many questions. Anyone who can tackle one of them
gets my respect, and you may award yourself one cookie.
I'd like to piece this system together and get it working to the
point where I can play with it and at least fiddle with the monitor
again, playing with Octal. And I'd dearly love to put it in a
proper DEC desk-side rack with an RK05, but that comes later...
Thanks much,
-Seth
<From: Captain Napalm <spc(a)armigeron.com>
< I think the PDP-11 has only three things in common with the Alpha:
<
< D E C
ROTFL-TB!!!
Sorta like my earlier answer about x86 VS PDP-11...
< If the PDP-11 is anything like the VAX in terms of instruction space, i
<might be possible. The only hitch is unaligned reads/writes to memory (I
Similar to vax. PDP11 is a word machine and instruction words must fall
on even addresses.
< I don't think so. The current trend in CPU design in away from comple
<instruction sets (which is something the VAX is) and more towards simplif
PDP-11 was a very CISC machine.
< Check bask issues of Byte (pre '88 - your local library or university
<library might have them). Full schematics for a slew of computers (mostl
<from Steve Ciarcia) and in the Sep/Oct '85 issues the schematic for a CPU
<Ah, if only I had the time and equipment ...
EGO, I have those issues. simple but not a good design as the sequencer
is really complex and microcoded would have been far far simpler and
easier to debug. Otherwise it tried to copy the two address scheme
PDP11 used but it's not orthogonal.
Allison
Yes it is in octal. If you noticed the keypad has numbers from 0 to 7 so the
whole system works in base 8.
The R key is a hardwired reset.
and the A, B, and C keys are not used by the KEX program.
By the way this kit was also called the Mini Micro Designer (MMD-1) and was
distributed by Circuit Design, inc. for $125 in kit form.
Francois
-------------------------------------------------------------
Visit the Sanctuary at: http://www.pclink.com/fauradon
-----Original Message-----
From: Tony Duell <ard(a)p850ug1.demon.co.uk>
To: Discussion re-collecting of classic computers
<classiccmp(a)u.washington.edu>
Date: Thursday, April 16, 1998 6:17 PM
Subject: Re: 8080 Trainer - more info
>>
>> This Trainer was called the Dyna-Micro
>> Here is the Memory allocation:
>
>Thanks for this info (and thanks to Glenn for posting the ROM listing).
>It looks like I'll be able to get it working...
>
>> Hi Lo
>> 000 000 \
>> > Key Prom
>> 000 377 /
>> 001 000 \
>> > Optional ROM
>> 002 377 /
>
>I now have to work out which socket is which. Shouldn't take long - I
>recognise all the chips, have data one them, and it's quite simple. Don't
>spoil it for me by posting the answer just yet ;-)
>
>> 002 000 \
>> > Optional R/W Memory
>> 003 377 /
>
>002 377 ? I think. I assume you're using an octal representation of each
>byte of the address here - something 8080 people often did. I think I
>have the option RAM on my machine. At least, there are no spare sockets
>in that area (4 RAM chips fitted).
>
>> 003 000 \
>> > R/W Memory
>> 003 377 /
>> 004 000 \
>> > Available for user expansion
>> 377 377 /
>>
>> Will post more later
>> Does anyone knows where I can find a 1702 programmed with KEX?
>
>Well, if I get my machine working, I'll probably have to program a 1702
>on the old Intellec. In which case I'd be able to make a few for other
>people if they send me blanks.
>
>But it might just be easier to put it into a 2716 or 2764 and make up a
>kludge board (or if you're building a machine from scratch, just design
>the board to take one).
>
>> Francois
>
>-tony
>
<But, since Alphas must share SOMETHING in common with the PDP-11,
<wouldn't it be possible to write a normal program for the Alpha,
<running under NT or Linux, that would give PDP emulation at P-II-like
Not even close. Alpha isn't even like vax. PDP-11 and VAX were lighly
CISC machines where the alpha is vary RISC like. I'm sure PAL code
in the alpha could emulate PDP11 instructions and it would be very fast
but it would still be 16bit and to munge a large array the system would
have to map it into the 4mb max using MMU emulation.
<Now, making a VAX that would do that is a bit more interesting, though
<probably already done. VAX is much more useful these days than PDP-11.
Emulating PDP-11 on a 11/780 vax was a compatability bit and ran it
directly. For later vaxen RTEM ran PDP-11 programs on vax and generally
faster than the PDP11 (assuming the vax was faster itself).
<More on this subject: I have long thought that some computers that
<are now mostly PD, like the C-64, should be rebuilt in kit form and
<sold to kids for $20 each. Now THAT would be nice. Oh, and make them
<make their own kernel, and hold a contest for the best one. The
Get real, few if any are PD. The design is copyrighted or at least
the vendor specific portions(PROMS, PALS, custom LSI) are.
<>fits in the primary cache of an Alpha. If possible, you'd be using the
<Alpha
<>essentially as a programmable microengine and programming it to be
<PDP-11.
<>The reason to fit it in the primary cache is because of how the Alpha
<boots;
Huh? a PDP11 emulator for alpha would be written as PAL to get the best
results. Caching it is pointless as it's still a 16bit machine and
would still flog itself to death trying to manage a data file greater
than fits in ram (4mb max on PDP11 and some of that would be code!).
The point being, going to VAX(32bits) and later alpha(64bits) was not
raw speed but the limits of having enough bits to address really huge data
arrays in RAM and to express disk data addresses in values that fit in one
register. PDP-11 was 16bits and the MMU allowed it to may that 16bits
into 22bit address space. The however of that was at any time you could
only reach 16bit address worth of data or you had to remap the MMU.
That later step was a limiting factor if your data file was 32mb in size.
PDP-11s were fast and good but the limits of 16bit addressing were well
known by the late 1970s and that was why DEC moved to 32bit VAX in 1978.
Even then a really fast 11/70 could nearly outrun it unless the data file
operated on was say several megabytes in size and the VAX would leave the
11 behind everytime. If that weren't true we'd be running 500mhz PDP-8s!
Allison
