9 Nov
2011
9 Nov
'11
9:09 p.m.
On 10/11/2011, at 12:35 AM, David Riley wrote:
On Nov 9, 2011, at 11:08 AM, Scott Kevill wrote:
Thanks, I'm still very new to the electronics side (I'm a software guy).
I have a Spartan 6 FGPA dev board that has 48 5V-tolerant I/Os (via CBT3244ABQ bus
switches) and 20 non-5V-tolerant I/Os. I'm trying to figure out the easiest way to
create a general daughterboard that would allow me to test/play-with a bunch of different
DIP ICs (eg. microcontrollers, CPUs, ROMs, etc.) with minimal manual rewiring for each IC
(remapping with constants in the HDL instead).
All the I/Os output 3.3V, which is fine for most of the signals I need, but some ICs (eg.
Z80+DMA+PIO+SIO, 8021) need higher. Plus being able to output 5V would mean it could
provide pin-configurable Vcc for most of the other ICs.
Making the requirements more tricky, some of the ICs require other supply voltages outside
that range. (eg. FD1771 needs -5V & +12V; FD1793 needs +12V; 8021 needs +15V to dump;
M57630 ROM needs -5V & +12V). I don't need to drive these oddball voltages from
FPGA I/Os, so I don't mind wiring those manually.
It would be nice if I could also use this to play with my Votrax SC-01A, but that's
even weirder with minimum input voltages of more like +6 to +8V (according to the SC-01
datasheet, assuming the SC-01A is similar). So I'd ignore this one and use a separate
circuit for it.
So..
- a huge 64-pos (MC68000 and some microcontrollers) universal ZIF socket
- alternatively a 48-pos universal ZIF and a regular 64-pos socket
- a way to output 5V from all 64 I/Os
- additional 5V tolerance for 16 of the non-5V-tolerant FPGA I/Os (48 are already 5V
tolerant)
- either additional -5V to +15V tolerance for all I/Os or a way to manually isolate
per-I/O from the manually wired supply voltages above (eg. SPDT dip switches?) The FPGA
I/Os do support tri-stating, but I'm not sure that would be safe.
- two rows of 32 header pin sockets? to allow a flying lead to supply any IC pin
- highest signal rate needed would probably be 8MHz for the MC68000, although hmm.. if I
were sampling or measuring IC timing, perhaps higher for input signals (eg. 32 MHz)
This does leave 4 unused I/Os that may or may not be helpful.
I would be creating a PCB for this, but through-hole would be preferred as I have no
experience (yet) with SMT.
Thoughts? Suggestions? Or is this crazy/na?ve? :)
Scott.
I vaguely remember looking at that series.
They're 5V tolerant, but won't output 5V from 3.3V, right?
It's just a bunch of FETs. There's a good app note by TI on using them to
convert both directions, actually. IIRC it uses an open-collector arrangement of sorts,
so it's not super-fast (though that depends on what your metric for fast is), but
it's great for I2C level conversion. Not bad for other stuff, either.