PDP-11/05 Fault?

[Jay Jaeger]

On 9/29/2021 6:31 PM, Matt Burke via cctalk wrote:
> 
> I've been restoring a PDP-11/05 recently and after replacing several
> faulty ICs I have it mostly working. I've run into a bit of a problem
> whilst running MAINDEC-11-D0NB (T14 TRAP TEST) though.
> 
> The failing instruction sequence is:
> 
> 7200:   MOV #6340,R0
> 7204:   MOV R0,(R0)+
> 7206:   CMP 6340,#6342
> 7214:   BEQ 7220
> 7216:   HALT
> 
> This halts at 7216 with:
>    R0 = 6342
>    6340 = 6340
> 
> I tried this same set of instructions on a PDP-11/84 and also on Simh
> and the result is:
>    R0 = 6342
>    6340 = 6342
> 
> which is what the diagnostic seems to expect.
> 

Firstly, I think this is a documented processor difference.

My PDP-11/05S , 11/10S manual, DEC-11-H05SS-B-D, in table 4-8, 
programming differences reads:

OPR %R,(R)+
    11/20: Contents of R are incremented by 2 *before* being used as the
           source operand.
    11/05 & 11/10: Initial contents of R are used as the source operand
    11/35 & 11/40: (Same as 11/20)

So the halt would be expected on an 11/05.

Secondly, I have an original DEC listing of D0NB.  On it I have a 
written note (by me) "Bugs according to (UW Madison) ECE".   But there 
is no notation of that those bugs might be.

The source in my listing reads essentially the same as what you have 
written (comments abbreviated to fit on my lines):

7200  012700 006340          MOV    #K11,%0     ; SRC and DST BOTH R0
7204  010020                 MOV    %0,(0)+     ; SRC No Mem Reference
7206  026727 177126 006342   CMP    K11,+#K11+2 ; Dest Is Mem Reference
7214  001401                 BEQ    .+4
7216  000000                 HLT                ; Failed %(0),(0)+
7220  010700                 SCOPE

JRJ