PDP-11/45 RSTS/E boot problem

Jon Elson elson at pico-systems.com
Wed Feb 6 20:29:30 CST 2019

On 02/06/2019 04:24 PM, Brent Hilpert via cctalk wrote:
> On 2019-Feb-06, at 1:21 PM, Noel Chiappa via cctalk wrote:
>>> From: Brent Hilpert
>>> what about the refresh circuitry of the memory board?
>>> ...
>>> It might also explain why a number of 4116s were (apparently) failing
>>> earlier in the efforts ... replacing them might have just replaced them
>>> with 'slightly better' chips, i.e. with a slightly longer refresh tolerance.
>> Ooh, excellent idea!
> Is the schematic available for the memory board at-issue?
> Curious myself to see what approach for refresh DEC used.
Hmm, yes, if the refresh is done by one-shots and RC timing, 
a failed cap could silently kill the refresh trigger.  An 
easy way to check is put something in a few locations and 
halt the CPU for some time (seconds to minutes).  If the 
content is now gone, then the refresh is very likely not 
being done.


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