I have a non-functioning VT100. I think it is failing in the POST during the RAM check. I don't know for sure because I can't get it to light up the LEDs on the keyboard, however I used my logic analyser (a HP1630G) to see what values were written to the UART to send to the keyboard and I see it sends the values FF then 1, 2, 3, 4 and finally 5. The last value corresponds to the RAM test so I am fairly confident the RAM test is what is failing. I have disassembled the VT100 ROM and if I have understood it correctly it zeroes out the RAM (high address to low) and then for each address (low address to high) it tries first to read back the zero and then writes 0xAA to the location and tries to read that back. I am also confident the 8080 is working OK because I was able to capture an address trace on the ROM that showed it executing the program as per the disassembled ROM. My problem is getting the logic analyser reliably to tell me how each RAM chip is being addressed and what data is being read or written. I am seeing strange values for the addresses (sometimes) and I am not sure I have setup the logic analyser correctly. I have read the datasheet for the 2114 chip and I am not entirely clear that I have understood it correctly. Here is how I have set it up: Trigger on the -ve edge of Chip Select (pin 8) Capture A9-A0 as the address Capture WE as an indication of Read or Write The timing diagrams show the write cycle where the WE signal and CE signal seem to transition at the same time and the data may be only valid a bit later then the CS -ve edge. But this may just be me not knowing how to read the datasheet. Using the +ve edge of CS seems no better. Is there something I am missing about how to analyse how the RAM chips are being used? Thanks Rob