Some more thoughts: I can't see why the 5V Pulse signal would be steady at something like 32V unless there was a capacitor connected from it to ground somewhere which would get charged to a value approaching the peak value of the rectified signal. I've hunted all around the schematic and can't see anywhere else the 5V Pulse signal goes except to the Power OK circuit on H7842 Control Module Sheet 2 and I can't see any capacitor there or on H7842 PSU Sheet 3 where the signal originates. Can you check the physical unit and make sure that 5V Pulse is not connected to anything else, especially checking for a capacitor to ground? If there truly is no capacitor, there could be an unexpected path through some faulty component causing this signal to get smoothed when it would otherwise not. It's hard to see where this could be though. It is hard to imagine where else 32 odd volts could come from in this circuit other than by rectifying and having a capacitor smooth pulses with peak values in that sort of range. (The 12V Pulse signal does have a 4n7 capacitor to ground across it which could be significant at the frequency the chopper works at. Perhaps "12V Pulse" is not meant to be pulsing if this capacitor is open circuit?) It would be interesting to know the values of Vstart and Vz and what the voltage connected to the power supply pins of E1, E2 and E3 is. I suppose Vstart should be 12V given that it comes from a 7812. I can't see anywhere on the schematic what the power supply arrangements are for E1, E2 and E3 are or what the value of Vz should be. Regards, Peter Coghlan.

The rainbow 100 technical manual is here. It has a section on the ps. <http://bitsavers.org/pdf/dec/rainbow/EK-PC100-TM-001_Rainbow_100_Technical_Manual_May84.pdf> bitsavers.org<http://bitsavers.org/pdf/dec/rainbow/EK-PC100-TM-001_Rainb… [X]<http://bitsavers.org/pdf/dec/rainbow/EK-PC100-TM-001_Rainbow_100_Tech… Sent from my iPhone On Oct 12, 2025, at 12:48, Brent Hilpert via cctalk &lt;cctalk(a)classiccmp.org&gt; wrote: On 2025Oct 11,, at 2:45 AM, Robert Jarratt via cctalk &lt;cctalk(a)classiccmp.org&gt; wrote: I am trying to resolve a problem with a H7842 PSU from a DEC Rainbow. The AC OK output is not being asserted. I am looking at Tony Duell's schematic https://bitsavers.org/pdf/dec/rainbow/duell_schematics/psu.pdf and specifically at the Power OK circuit. I am using a test load of 1R on the 5V output and 6R on the 12V output, which is within the spec of the PSU. I see that under load the 5V output is only 4.4V, so I suppose it is to be expected that AC OK is not asserted. If I (briefly!) remove the load from just the 5V output, the 5V output is 5.27V, but the AC OK output is still not asserted. Using Tony's schematic, I looked at the input to the inductor on the secondary side (sheet marked "H7842 PSU Sheet 3") and it looks like this: https://rjarratt.wordpress.com/wp-content/uploads/2025/10/h7842-5v-secondar… I can't tell if that is correct or not. If I remove the 5V load the peaks narrow but are slightly higher. However, the puzzling thing is the 5V Pulse signal, it doesn't pulse, it is a steady 32V. I see that the 12V Pulse signal *does* pulse. The name would suggest it is supposed to pulse and its inputs do pulse as shown in the trace pictured above. I don't see how it is possible for 5V Pulse to be at a steady 32V, even if the diode or resistor that create the 5V Pulse signal was somehow bad. I guess this non-pulsing might be the problem, but I don't really know what to check here, I have lifted the diode and tested it, it seems fine. Does anyone have any suggestions please? - The design configuration: I don’t know of a single name for this configuration of PS, but it’s comprised of: - a switching driver - which drives an isolating pulse transformer - which drive inductive step-down buckers (for the +5 & +12 outputs) - and some final filtering around the outputs The isolation transformer performs some degree of V step-down but most of the voltage step-down-&-control is being performed by the bucker formed from a winding of the shared-core inductor "16-20387-01” and the 2•2 diodes. Those 2•2 diodes are a 1•2 rectifier and a 1•2 buck-discharge diode. From my observation this configuration seems to have been introduced in the 80s or came into wider use in that period. This is a very common/standard configuration for switching supplies these days. The point of all that is it’s not a full-wave (per 2 diodes) centre-tap rectifier feeding a filter, and it’s not a ‘simple’ single-stage switching supply. With the bucker(s) in there, the input pulses to the bucking inductor may be significantly higher than the target output voltage, which is evidenced in your scope trace where the input pulses are 42V peak >> 5V output. The "5V-pulse" signal is picked-off from the input side of the bucking operation, before the bucking+filter energy storage, so the pwr-OK circuit can get an early sense of pwr fail without having to wait for the energy storage to all discharge. - The schematic: . . . Was preparing this when Peter’s second message came in. So: <snip> And yes, everything Peter says about IC powers pins, Vz, and cap. I’ll add though, to check all 6 of those pins, traced or ohmed-out, both -pin and +pin. The circuit design implies that the E1 “GND” pin probably isn’t GND, but rather “-12V”. (Might be true for E2 & 3 too, so to check them). But there are two "-12V” supplies in the schematic. Are they actually connected together or are they separate? You might also check/confirm what is on those IC power pins when powered-up. - AC-OK: I take it you don’t mean “power-OK”, but rather the (no-number) pin on the “Logic Power” connector fed by the 2N5638 JFET. How are you observing “AC-OK”, is there anything connected to it? What are you expecting as ‘good’ indication? The JFET output is open-drain, so there won’t be any voltage there without something external to provide it. Based on presumptions about the IC power connections and the circuit, it looks like AC-OK-good is high-impedance, while not-good is low-impedance to GND. Or stick a 10K R on there to a +V. Or you could look at the output of the pwr-OK comparator instead.

On 2025Oct 12,, at 3:28 PM, Rob Jarratt &lt;robert.jarratt(a)ntlworld.com&gt; wrote: … What is ‘logically false’? 0V or –V? DEC used the JFETs to drive AC-OK so that no-power/power-off state would present low-Z-to-GND at AC-OK (i.e. 0V / LOW). If they used a bipolar, it would need power (base current) to get low-Z / 0V / AC-is-not-OK. Catch-22. The JFET conducts by default (gate JFET.G=0V), it needs V to pinch off conduction so it can go ’high'. But that JFET.G V must be negative (relative to source terminal JFET.S) to pinch off. And that’s why E1 has GND-pin at –V, so it’s output “Power-OK” can drive the JFET.G below JFET.S which is at circuit GND. So: E1a.+ E1b.– Power-OK(E1b.out) AC-OK ==== ==== =============== ===== power good: +5V ~~ +15V ~~ –12V ~ hi-Z power-bad: +5V ~~ < E1a.+ >+6V ~ low-Z power-off: 0V 0V 0V low-Z ~ = approximate (Above is supposed to render as a tabbed table) TDS = Tony’s schematic DRM = DEC rainbow manual per Wayne’s ref. Vz is in the lower left corner of TDS.pdf.5. Vz is apparently “V PR” in DRM and should be 5.1V [DRM.pdf.261-7.4.2.1]. Which is to say the zener there is some 5.1V type. 6.4V is rather high. I would suggest finding that zener on the board and measure right across it. 11.3V also seems a little low for output from a 7812. TDS.Vstart is apparently DRM.Vbias. I would still suggest checking the two “–12V” sources for connection. I expect they are not connected, and that E1.GND goes to the 2K7 “startup" –12V [TDS.pdf.2-lower-left-quadrant]. Measuring E2,E3.GND at –0.7 is a little odd if they are connected directly to circuit GND, you might want to look if there is a diode dropper involved for those pins.

On 2025Oct 13,, at 2:13 PM, Rob Jarratt &lt;robert.jarratt(a)ntlworld.com&gt; wrote: There’s some confusion here somewhere. Those input V's would imply the comp. output should be loZ to Vsupply– pin, around –12V; not hiZ, +7.5V. The output for these comparators is an open-collector NPN transistor with E on the Vsupply– pin. Behaviour is: inputs V output output output relation trans’r Z logical ===== ===== ==== ==== +in > –in OFF hiZ 1 +in < –in ON loZ-to-Vsup– 0 Where Vin are a signed voltage. So for the input V's you mention, what should be occurring is: E1a.+in = +6.3V E1a.–in = +10.4V (these would be saying ‘power-is-good') ==> +in < –in ==> E1a.outTran = ON ==> E1a.outV = –12V ~ (because E1.Vsupply– = –12.9V ~, per your prior measurement) ==> JFET.G < 0V (negative by some number of volts) ==> AC-OK = hi-Z = logic.1 = +V with pull-up R. Note the 5.1V comes from the DRM and it’s conceivable DEC adjusted the design and put a 6.2V zener in there without updating the DRM. IMO it’s something that should be sorted out as Vz is used for a bunch of control refs, though not the main Regulation ref. Ideally the diode type would be visible.

On 2025Oct 14,, at 1:42 PM, Rob Jarratt &lt;robert.jarratt(a)ntlworld.com&gt; wrote: I don’t think I’ve ever seen a comparator datasheet that explicitly laid out the input-to-output function - contrast with other device datasheets with detailed truth tables galore. The comp. datasheets always seem to assume “everybody knows that”. You can figure it out if you look at some of the example circuits or squint closely at just the right parameters in the specs and graphs or trace the operation through the internal schematic if present. In the absence of that, a lot of people seem to (wrongly) assume that “well, + > – would be 1, so transistor ON”. The other way of looking at it, is it’s the 'same direction' of behaviour as an op amp, but without the upper drive-high output transistor.

On Wed, Oct 15, 2025 at 12:47 AM Rob Jarratt via cctalk < cctalk(a)classiccmp.org&gt; wrote: TI is one of the worst for this.Especially if the chip implements an industry standard or is compatible with some other chip. In those cases, you barely get enough to understand. I've had to many times in the past hunt down an industry standard or get the datasheet for the part it's compatible with. DEC was really paranoid about single sourced parts, so just about everything is something that's widely used in the industry, and so has many suppliers... You might try that if you're having trouble understanding the datasheet for the exact part. Warner

Ethernet also got *way* more market traction, because it was infinitely more survivable. One of my early jobs was managing a Token Ring network, and we spent our days running around a 13 floor building, chasing machines where people had kicked connectors out of walls, just enough to stop data, but not enough to make the MAU do the self isolation. We had a piece of software called the Cabletron TR Manager - that monitored the ring for beaconing, and let us know the upstream node that detected the break. Then we would consult our *detailed* notes on what cards were installed where, so we could find the culprit that was broken. Without the notes, we would have had zero chance. Heady days. I suggested to the network manager at the time that we could transition from TR to Ethernet (everything was wired with Cat3 Shielded cable - but he didn't want to, because "Ethernet had collisions" - that was when I discovered that everybody has limitations that something breaks their thinking. After a while I convinced him to transition one of the Cabletron cards to Ethernet, and do a test on a 32 workstation card - Suffice to say that those 32 machines never had an issue, and eventually, all 800 machines across two rings were transitioned to 100Mb Ethernet. Kindest regards, Doug Jackson em: doug(a)doughq.com ph: 0414 986878 On Thu, 16 Oct 2025 at 09:12, Wayne S via cctalk &lt;cctalk(a)classiccmp.org&gt; wrote: