3 May
2025
3 May
'25
11:18 p.m.
Is anyone out there familiar with the Wang 2200 BASIC? Of about 1973/1974
C. Corti, I think you still have one of these complete and runnable?
My question is, was its basically really "built" using TTL logic/chips?
The system didn't really have a microprocessor (neither did the early
Alto, right?)
I recall that system had many boards, the whole "CPU" box was external to
the monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
-Steve
4 May
4 May
10:11 a.m.
I recall that system had many boards, the whole
"CPU" box was external to
the monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build a processor with some TTL, and then implement a BASIC on that
microprocessor.
There is always this intermediate step, no machine executes BASIC directly in TTL.
Look here for an example of a processor (Datapoint 2200) in TTL :
https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.pdf
Jos
8:24 p.m.
On 2025-05-04 2:11 a.m., jos via cctalk wrote:
Well for BASIC that is true.
The Fairchild Symbol Computer was test to just how far TTL could go.
I recall that
system had many boards, the whole "CPU" box was external to
the monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build a processor with
some TTL, and then implement a BASIC on that
microprocessor.
There is always this intermediate step, no machine executes BASIC
directly in TTL.
Look here for an example of a processor (Datapoint
2200) in TTL :
https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.pdf
Jos
Micocoded coded machines, could likely be programed to run basic.
Ben.
8:39 p.m.
On May 4, 2025, at 2:24 PM, ben via cctalk
<cctalk(a)classiccmp.org> wrote:
On 2025-05-04 2:11 a.m., jos via cctalk wrote:
Well for BASIC that is true.
The Fairchild Symbol Computer was test to just how far TTL could go.
Well, of course any general purpose computer can be made to run BASIC. If you mean that a
microcoded machine could directly implement a pseudo-code representation of BASIC, sure, I
suppose so. There isn't much point in that, though. Better just to compile it.
A language for which specific machines have been built a number of times is FORTH, which
makes sense because it is a rather low level language that explicitly manipulates data on
stacks. And the execution model has two stacks, so it is tempting to build a machine that
directly deals with that. There are some nice FPGA blocks for this, in VHDL or Verilog;
one example I remember was built to enable a robotics or machine vision application.
paul
I recall
that system had many boards, the whole "CPU" box was external to
the monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build a processor with
some TTL, and then implement a BASIC on that microprocessor.
There is always this intermediate step, no machine executes BASIC directly in TTL. Look here for an example of a processor
(Datapoint 2200) in TTL :
https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.pdf
Jos
Micocoded coded machines, could likely be programed to run basic.
Ben.
9:17 p.m.
On May 4, 2025, at 3:06 PM, Johan Helsingius via
cctalk <cctalk(a)classiccmp.org> wrote:
On 04/05/2025 20:39, Paul Koning via cctalk wrote:
Good point. And yet another is ALGOL 60 -- the Burroughs mainframes are stack machines
nicely matched to what ALGOL needs, and Burroughs created several special-purpose
languages based on ALGOL for that machine. The OS uses one (ESPOL); there is one for the
communications machinery (DC-ALGOL) and it has a compiled ALGOL variant called WFL (work
flow language) for the batch job control. (As an analogy, imagine if "bash"
were a compiler rather than an interpreter.)
paul
A language for which specific machines have been
built a number of times is FORTH
Another is Lisp. 
9:44 p.m.
On 04/05/2025 21:17, Paul Koning via cctalk wrote:
Good point. And yet another is ALGOL 60
A more obscure one - The Nokia MPS-10, a 32-bit supermini from
1983, with a microprogrammed architecture optimized for Ada.
https://dl.acm.org/doi/10.1145/989798.989799
Julf
5 May
5 May
8:28 p.m.
Folks
There was another Basic Language Machine, UK 1960's, nothing to do with the eponymous
language and goo's AI seems able to halucinate it and microcode in responses.
https://en.wikipedia.org/wiki/John_Iliffe_(computer_designer)#The_Basic_Lan…
The BLM was a precursor to the ICL 2900 and subsequent series of machines
https://en.wikipedia.org/wiki/ICL_2900_Series
Most interestingly the BLM/ICL 2900 was architected to work with Algol68 / S3, just as the
Boroughs 6500/7500 was designed for Algol 60. And, most interestingly they are
architecturally very similar : objective, techniques, etc.
See eg Siewiorek, Bell, Newell; "Computer Structures : Principles and Examples;
McGraw Hill; 1982; ISBN 0-07-057302-6; Part 2 Section 2 pp227ff
Perhaps a demonstration of the perils of overloaded words, especially in the age of AI
Martin
-----Original Message-----
From: Paul Koning via cctalk [mailto:cctalk@classiccmp.org]
Sent: 04 May 2025 19:18
Good point. And yet another is ALGOL 60 -- the Burroughs mainframes are stack machines
nicely matched to what ALGOL needs, and Burroughs created several special-purpose
languages based on ALGOL for that machine. The OS uses one (ESPOL); there is one for the
communications machinery (DC-ALGOL) and it has a compiled ALGOL variant called WFL (work
flow language) for the batch job control. (As an analogy, imagine if "bash"
were a compiler rather than an interpreter.)
paul
4 May
4 May
10:05 p.m.
The IBM5100 also uses the term "microcode" - but I'm not sure if that term
pre-1975 means the same as what, say, Intel used it for around the x86?
I've seen a glimpse into the syntax of the x86 microcode. In the IBM
5100's case, its CPU is distributed across 14 or so SLT chips - so I never
fully understood how it implements its PALM instruction set. I know the
two large IC on that process are two 64-byte memory things (dunno if
categorized as SRAM or DRAM, or neither), mapped to the first 128 bytes of
system RAM (so a high speed pass through, where that 128 bytes correspond
to the registers used by each of the 4 interrupt levels). That PALM
processor was developed right around the time of the Intel 4004 (late '71 /
mid '72), and stout enough to run a version of APL about a year later (I
see Intel made a version of FORTRAN for the 8008, or at least a claim for
it in the Intertec brochures).
Anyway, all I mean is, in early 70s did "microcode" just mean
instruction-set, and that changed a few years later? Or did microcode
always mean some kind of "more primitive sequence" used to construct into
an instruction set?
-Steve
On Sun, May 4, 2025 at 1:33 PM ben via cctalk <cctalk(a)classiccmp.org> wrote:
On 2025-05-04 2:11 a.m., jos via cctalk wrote:
Well for BASIC that is true.
The Fairchild Symbol Computer was test to just how far TTL could go.
> I recall that system had many boards, the
whole "CPU" box was external
to
the
monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build a processor with some TTL, and then implement a BASIC on that
microprocessor.
There is always this intermediate step, no machine executes BASIC
directly in TTL.
Look here for an example of a processor
(Datapoint 2200) in TTL :
https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.pdf
Jos
Micocoded coded machines, could likely be programed to run basic.
Ben.
10:21 p.m.
On May 4, 2025, at 4:05 PM, Steve Lewis via cctalk
<cctalk(a)classiccmp.org> wrote:
The IBM5100 also uses the term "microcode" - but I'm not sure if that term
pre-1975 means the same as what, say, Intel used it for around the x86?
I've seen a glimpse into the syntax of the x86 microcode. In the IBM
5100's case, its CPU is distributed across 14 or so SLT chips - so I never
fully understood how it implements its PALM instruction set. I know the
two large IC on that process are two 64-byte memory things (dunno if
categorized as SRAM or DRAM, or neither), mapped to the first 128 bytes of
system RAM (so a high speed pass through, where that 128 bytes correspond
to the registers used by each of the 4 interrupt levels). That PALM
processor was developed right around the time of the Intel 4004 (late '71 /
mid '72), and stout enough to run a version of APL about a year later (I
see Intel made a version of FORTRAN for the 8008, or at least a claim for
it in the Intertec brochures).
Anyway, all I mean is, in early 70s did "microcode" just mean
instruction-set, and that changed a few years later? Or did microcode
always mean some kind of "more primitive sequence" used to construct into
an instruction set?
The latter, as far as I know. And in "horizontal microcode" you have a rather
wide microcode instruction word with a bunch of fields, each of which encodes a portion of
what the machine is doing for a particular cycle. The microcode and the microengine may
well be specialized for a particular instruction set, as opposed to the "general
purpose" microcode that lets you pick the "macro" instruction set fairly
broadly. For example, with the possible exception of the PDP-11/60 I suspect that PDP-11
microengines do PDP-11 instruction set execution nicely, but wouldn't be all that
effective with other ISPs. The 11/60 is a bit different, at least I know it was used to
implement PDP-8 execution at speeds higher than that of "real" PDP-8 machines.
paul
5 May
5 May
1:27 a.m.
The Packard-Bell PB440 (1963) was microprogrammable:
https://bitsavers.org/pdf/packardBell/PB-440/SP-149A_PB-440_microprogrammin…
Various earlier systems used microprogram-like techniques, but I don't
know how many were earlier than PB in their use of the word.
Was the PB-250's floating point microprogrammed?
--Chuck
9:45 a.m.
ACM's precis of who what when : https://amturing.acm.org/info/wilkes_1001395.cfm
To paraphrase:
- 1951 concept
- 1958 reduced to practice in ESDAC2 in the chilly fens; Cambridge UK
- 1964 IBM 360 Model $
Martin
-----Original Message-----
From: Chuck Guzis via cctalk [mailto:cctalk@classiccmp.org]
Sent: 04 May 2025 23:27
To: Paul Koning via cctalk <cctalk(a)classiccmp.org>
Cc: Chuck Guzis <tubastuff(a)yahoo.com>
Subject: [cctalk] Re: Wang TTL BASIC
The Packard-Bell PB440 (1963) was microprogrammable:
https://bitsavers.org/pdf/packardBell/PB-440/SP-149A_PB-440_microprogrammin…
Various earlier systems used microprogram-like techniques, but I don't know how many
were earlier than PB in their use of the word.
Was the PB-250's floating point microprogrammed?
--Chuck
3:47 p.m.
On Sun, 4 May 2025, Chuck Guzis wrote:
Various earlier systems used microprogram-like
techniques, but I don't
know how many were earlier than PB in their use of the word.
The Zuse Z1 from 1936(!) was microcoded, too. It implemented for example
floating-point arithmetic and conversion instructions (binary<-->decimal).
Christian
5:09 p.m.
On 05/05/2025 14:47, Christian Corti via cctalk wrote:
On Sun, 4 May 2025, Chuck Guzis wrote:
I think
"Microprogramming" as a technique has been around as long as we
have had computers. Couldn't the setting up ENIAC to behave like a
stored program computer in 1948 be described as "Microprogramming"?
Various earlier systems used microprogram-like
techniques, but I don't
know how many were earlier than PB in their use of the word.
The Zuse Z1 from 1936(!) was microcoded, too. It
implemented for example
floating-point arithmetic and conversion instructions
(binary<-->decimal).
Christian
Dave
11:02 p.m.
On Mon, May 05, 2025 at 04:09:29PM +0100, David Wade via cctalk wrote:
I think "Microprogramming" as a technique
has been around as long as we have
had computers. Couldn't the setting up ENIAC to behave like a stored program
computer in 1948 be described as "Microprogramming"?
That's an interesting question, but I'd say yes. I base that
on the idea that microprogramming is essentially programming
one universal machine to emulate another universal machine
with the purpose of using the programming model of the second
machine as one that is more convenient than that of the
first. Of course, it doesn't look at all like the microprogramming
we're used to, but I'd say it still applies.
> The Zuse Z1 from 1936(!) was microcoded, too. It
implemented for example
> floating-point arithmetic and conversion instructions
> (binary<-->decimal).
>
> Christian
I'd add that we can go back even farther. Babbage included
a mechanism on the analytical engine for the more complex
operations that was effectively microcode. I was implemented
with a cylinder (referred to as a barrel) that you could
screw blocks into. A set of levers were pressed against
a line of block positions along the length of the cylinder
and the presence or absence of a block would determine
whether the connected mechanism is engaged. Then the cylinder
is turned one step and the process repeated. The whole
thing ends up being a lot like typical horizontal microcode.
BLS
7 May
7 May
7:50 a.m.
For reference, Shirriff describes aspects of the 8086 microcode here
How the 8086 processor's microcode engine works
<https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html>
https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html
Including a reference to 1951 Wilkes concept.
As the S/360 used microcode, I'm suspect if PALM used some form of
microcode (which was developed at or near Boca Raton c.1971, but not much
is known about it -- we have its instruction set documented as early at
1972, and the "M" is PALM is said to be Microcode). Just unclear what they
really had going on in those SLT modules.
But back on the original Wang question: I still can't find high resolution
images of it's CPU board. According to 1991 discussion here on the 2200B,
there is also mention of the system not really having an instruction set,
BASIC was all it could do since it was "hard wired."
https://groups.google.com/g/alt.folklore.computers/c/lb0DzzDja-Y
I would think by 1991 they knew what a ROM was and would have called it as
such, so I'm still curious if we have right on how that system worked.
People may have had that impression about the IBM 5100, but we've showed it
has a DSP (kind of diagnostic mode) where you code in PALM machine code
(or even load "binary blobs" of previously stored PALM code onto tape [
video on it here, towards the end I load an IBM 5100 ported version of
Corti's original one he did for the 5110
https://www.youtube.com/watch?v=e2GYWyZyfpE
]), and the earliest PALM instruction docs we have is from 1972. That doc
doesn't describe how many cycles each instruction takes, but I think in the
IBM 5100 SLM docs it does imply they have a variable number of cycles.
On Mon, May 5, 2025 at 4:18 PM Brian L. Stuart via cctalk <
cctalk(a)classiccmp.org> wrote:
On Mon, May 05, 2025 at 04:09:29PM +0100, David Wade
via cctalk wrote:
I think "Microprogramming" as a
technique has been around as long as we
have
had computers. Couldn't the setting up ENIAC
to behave like a stored
program
computer in 1948 be described as
"Microprogramming"?
That's an interesting question, but I'd say yes. I base that
on the idea that microprogramming is essentially programming
one universal machine to emulate another universal machine
with the purpose of using the programming model of the second
machine as one that is more convenient than that of the
first. Of course, it doesn't look at all like the microprogramming
we're used to, but I'd say it still applies.
> The Zuse Z1 from 1936(!) was microcoded,
too. It implemented for
example
> floating-point arithmetic and conversion
instructions
> (binary<-->decimal).
>
> Christian
I'd add that we can go back even farther. Babbage included
a mechanism on the analytical engine for the more complex
operations that was effectively microcode. I was implemented
with a cylinder (referred to as a barrel) that you could
screw blocks into. A set of levers were pressed against
a line of block positions along the length of the cylinder
and the presence or absence of a block would determine
whether the connected mechanism is engaged. Then the cylinder
is turned one step and the process repeated. The whole
thing ends up being a lot like typical horizontal microcode.
BLS
8:52 a.m.
On Wed, 7 May 2025, Steve Lewis wrote:
As the S/360 used microcode, I'm suspect if PALM
used some form of
microcode (which was developed at or near Boca Raton c.1971, but not much
is known about it -- we have its instruction set documented as early at
1972, and the "M" is PALM is said to be Microcode). Just unclear what they
really had going on in those SLT modules.
Yes, the PALM is a (by modern terms) microcoded CPU. The block diagram
and the processor data flow chart in the MIM show amongst the signals the
microcode ROS (control ROS).
People may have had that impression about the IBM
5100, but we've showed it
I wonder why, because the instruction set was documented in the 5100 MIM
that was distributed with every machine. The omitted that part in the 5110
MIM, though.
Christian
11:54 a.m.
Steve
Thank you for the link to Shrriff (below) - interesting and with valuable references,
including from the commentariat
Folks
Two microprogramming URLs worth following up - both pdfs
https://ed-thelen.org/comp-hist/MicroprogrammingABriefHistoryOf.pdf 2012 commentary on
microprogramming
https://baltazarstudios.com/webshare/A-Z80/Library/Demystifying%2520Micropr…
Z8000 design retrospective
Enjoy
Martin
-----Original Message-----
From: Steve Lewis via cctalk [mailto:cctalk@classiccmp.org]
Sent: 07 May 2025 05:50
To: General Discussion: On-Topic and Off-Topic Posts <cctalk(a)classiccmp.org>
Cc: Steve Lewis <lewissa78(a)gmail.com>
Subject: [cctalk] Re: Wang TTL BASIC
For reference, Shirriff describes aspects of the 8086 microcode here How the 8086
processor's microcode engine works
<https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html>
https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html
Including a reference to 1951 Wilkes concept.
As the S/360 used microcode, I'm suspect if PALM used some form of microcode (which
was developed at or near Boca Raton c.1971, but not much is known about it -- we have its
instruction set documented as early at 1972, and the "M" is PALM is said to be
Microcode). Just unclear what they really had going on in those SLT modules.
But back on the original Wang question: I still can't find high resolution images of
it's CPU board. According to 1991 discussion here on the 2200B, there is also mention
of the system not really having an instruction set, BASIC was all it could do since it was
"hard wired."
https://groups.google.com/g/alt.folklore.computers/c/lb0DzzDja-Y
I would think by 1991 they knew what a ROM was and would have called it as such, so
I'm still curious if we have right on how that system worked.
People may have had that impression about the IBM 5100, but we've showed it has a DSP
(kind of diagnostic mode) where you code in PALM machine code (or even load "binary
blobs" of previously stored PALM code onto tape [ video on it here, towards the end I
load an IBM 5100 ported version of Corti's original one he did for the 5110
https://www.youtube.com/watch?v=e2GYWyZyfpE
]), and the earliest PALM instruction docs we have is from 1972. That doc doesn't
describe how many cycles each instruction takes, but I think in the IBM 5100 SLM docs it
does imply they have a variable number of cycles.
On Mon, May 5, 2025 at 4:18 PM Brian L. Stuart via cctalk < cctalk(a)classiccmp.org>
wrote:
On Mon, May 05, 2025 at 04:09:29PM +0100, David Wade
via cctalk wrote:
I think "Microprogramming" as a
technique has been around as long as
we
have
had computers. Couldn't the setting up ENIAC
to behave like a stored
program
computer in 1948 be described as
"Microprogramming"?
That's an interesting question, but I'd say yes. I base that on the
idea that microprogramming is essentially programming one universal
machine to emulate another universal machine with the purpose of using
the programming model of the second machine as one that is more
convenient than that of the first. Of course, it doesn't look at all
like the microprogramming we're used to, but I'd say it still applies.
> The Zuse Z1 from 1936(!) was microcoded,
too. It implemented for
example
> floating-point arithmetic and conversion
instructions
> (binary<-->decimal).
>
> Christian
I'd add that we can go back even farther. Babbage included a
mechanism on the analytical engine for the more complex operations
that was effectively microcode. I was implemented with a cylinder
(referred to as a barrel) that you could screw blocks into. A set of
levers were pressed against a line of block positions along the length
of the cylinder and the presence or absence of a block would determine
whether the connected mechanism is engaged. Then the cylinder is
turned one step and the process repeated. The whole thing ends up
being a lot like typical horizontal microcode.
BLS
7:45 p.m.
Coincidentally, this link to photos of a Wang 2200 came through a facebook group today.
Apparently he recently acquired one.
Will
https://www.icloud.com/sharedalbum/?fbclid=IwY2xjawKIevhleHRuA2FlbQIxMQBicm…
On 05/07/2025 5:54 AM EDT Martin Bishop via cctalk
<cctalk(a)classiccmp.org> wrote:
Steve
Thank you for the link to Shrriff (below) - interesting and with valuable references,
including from the commentariat
Folks
Two microprogramming URLs worth following up - both pdfs
https://ed-thelen.org/comp-hist/MicroprogrammingABriefHistoryOf.pdf 2012 commentary on
microprogramming
https://baltazarstudios.com/webshare/A-Z80/Library/Demystifying%2520Micropr…
Z8000 design retrospective
Enjoy
Martin
-----Original Message-----
From: Steve Lewis via cctalk [mailto:cctalk@classiccmp.org]
Sent: 07 May 2025 05:50
To: General Discussion: On-Topic and Off-Topic Posts <cctalk(a)classiccmp.org>
Cc: Steve Lewis <lewissa78(a)gmail.com>
Subject: [cctalk] Re: Wang TTL BASIC
For reference, Shirriff describes aspects of the 8086 microcode here How the 8086
processor's microcode engine works
<https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html>
https://www.righto.com/2022/11/how-8086-processors-microcode-engine.html
Including a reference to 1951 Wilkes concept.
As the S/360 used microcode, I'm suspect if PALM used some form of microcode (which
was developed at or near Boca Raton c.1971, but not much is known about it -- we have its
instruction set documented as early at 1972, and the "M" is PALM is said to be
Microcode). Just unclear what they really had going on in those SLT modules.
But back on the original Wang question: I still can't find high resolution images of
it's CPU board. According to 1991 discussion here on the 2200B, there is also mention
of the system not really having an instruction set, BASIC was all it could do since it was
"hard wired."
https://groups.google.com/g/alt.folklore.computers/c/lb0DzzDja-Y
I would think by 1991 they knew what a ROM was and would have called it as such, so
I'm still curious if we have right on how that system worked.
People may have had that impression about the IBM 5100, but we've showed it has a DSP
(kind of diagnostic mode) where you code in PALM machine code (or even load "binary
blobs" of previously stored PALM code onto tape [ video on it here, towards the end I
load an IBM 5100 ported version of Corti's original one he did for the 5110
https://www.youtube.com/watch?v=e2GYWyZyfpE
]), and the earliest PALM instruction docs we have is from 1972. That doc doesn't
describe how many cycles each instruction takes, but I think in the IBM 5100 SLM docs it
does imply they have a variable number of cycles.
On Mon, May 5, 2025 at 4:18 PM Brian L. Stuart via cctalk < cctalk(a)classiccmp.org>
wrote:
> On Mon, May 05, 2025 at 04:09:29PM +0100, David Wade via cctalk wrote:
> > I think "Microprogramming" as a technique has been around as long as
> > we
> have
> > had computers. Couldn't the setting up ENIAC to behave like a stored
> program
> > computer in 1948 be described as "Microprogramming"?
>
> That's an interesting question, but I'd say yes. I base that on the
> idea that microprogramming is essentially programming one universal
> machine to emulate another universal machine with the purpose of using
> the programming model of the second machine as one that is more
> convenient than that of the first. Of course, it doesn't look at all
> like the microprogramming we're used to, but I'd say it still applies.
>
> > > The Zuse Z1 from 1936(!) was microcoded, too. It implemented for
> example
> > > floating-point arithmetic and conversion instructions
> > > (binary<-->decimal).
> > >
> > > Christian
>
> I'd add that we can go back even farther. Babbage included a
> mechanism on the analytical engine for the more complex operations
> that was effectively microcode. I was implemented with a cylinder
> (referred to as a barrel) that you could screw blocks into. A set of
> levers were pressed against a line of block positions along the length
> of the cylinder and the presence or absence of a block would determine
> whether the connected mechanism is engaged. Then the cylinder is
> turned one step and the process repeated. The whole thing ends up
> being a lot like typical horizontal microcode.
>
> BLS
>
>
You just can't beat the person who never gives up.
Babe Ruth
8:23 p.m.
On Wednesday, May 7, 2025 at 0:50, Steve Lewis via cctalk wrote:
But back on the original Wang question: I still
can't find high
resolution images of it's CPU board. According to 1991 discussion here
on the 2200B, there is also mention of the system not really having an
instruction set, BASIC was all it could do since it was "hard wired."
Section 4 of the "2200 Systems Maintenance Manual" here:
http://www.wang2200.org/docs.html
...contains the theory of operation of the CPU. Subsection 4.2 is the
"General Instruction Set Description." The BASIC interpreter is contained
in ROM providing 20-bit instructions that are executed by the hardware.
The "Wang 2200 CPU schematics" here:
http://www.wang2200.org/schematics.html
...show that the ALU is a single 74181, implying essentially a 4-bit
processor.
-- Dave
8:37 p.m.
J. David Bryan via cctalk wrote:
...contains the theory of operation of the CPU. Subsection 4.2 is the
"General Instruction Set Description." The BASIC interpreter is contained
in ROM providing 20-bit instructions that are executed by the hardware.
The "Wang 2200 CPU schematics" here:
http://www.wang2200.org/schematics.html
...show that the ALU is a single 74181, implying essentially a 4-bit
processor.
-- Dave
Dave a Z80 has an 4 Bit ALU, but isn't essentially a 4-bit processor.
Regards,
Holm
BTW: I have two Wang 2200 waiting in my garage until I have time to look
at them...
--
Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,
Goethestrasse 15, 09569 Oederan, USt-Id: DE253710583
info(a)tsht.de Tel +49 37292 709778 Mobil: 0172 8790 741
11:59 p.m.
On Wednesday, May 7, 2025 at 20:37, Holm Tiffe via cctalk wrote:
Dave a Z80 has an 4 Bit ALU, but isn't essentially
a 4-bit processor.
I'm not familiar with the Z80 internals. However, the 2200 theory of
operation manual states, "The eight 4-bit File Registers are used as
general purpose registers during arithmetic computations and related
calculator processing." Also, "When data is written into memory, only four
bits from the data bus can be written at a time." Also, the immediate
machine instructions supply only 4-bit operand values. These plus the
presence of decimal instructions seem suggestive to me that the machine is
designed to process digit-serial BCD numbers.
-- Dave
8 May
8 May
2:06 a.m.
? Section 4 of the "2200 Systems Maintenance Manual" here:
...
...contains the theory of operation of the CPU.
Subsection 4.2 is the
"General Instruction Set Description." The BASIC interpreter is contained
Thanks! Exploring more through this reference..
Page 88 in the larger (filesize) version of that Systems of Operations
(last sentence):
"In a similar manner, the complete microprogram is written to produce the
desired results and then is stored in a 'hardwired' Instruction Memory."
Not sure why they put 'hardwired' in quotes, instead of just saying memory
address (unless, as someone earlier suggested, they just hadn't evolved up
to that terminology yet).
The instructions (from the table) seem to be 20-bit: most of the opcodes
are 5-bit, except branch instructions being 4-bit. The operand registers
are 4-bit.
Page 93, 4.3 first sentence: "As mentioned in 4.1, the BASIC Interpreter
contained in Instruction ROM is the important link between the user's BASIC
program and the machine instructions." This followed by a memory map of
RAM (for symbol tables).
Later, the BASIC tokens are referred to as "text atom" (apparently 96
tokens each with a 16-bit address pointer for handling). Like the IBM
5100 (and S/3 before it), the line of BASIC must be syntactically valid
before it is accepted/stored. Like the 5100 manuals, they use the term
microprogram and microcode (which I think in their usage, are equivalent to
what we today call machine code and instruction set).
Then Section 4.4.1 goes cycle by cycle on the startup sequence. The PDF
(for me) isn't searchable, so I'm not seeing reference to any "hot key"
to
enable any kind of built in monitor/machine code entry like the 5100 had.
Neat stuff!
On Wed, May 7, 2025 at 2:13 PM J. David Bryan via cctalk <
cctalk(a)classiccmp.org> wrote:
> On Wednesday, May 7, 2025 at 0:50, Steve Lewis via cctalk wrote:
>
> > But back on the original Wang question: I still can't find high
> > resolution images of it's CPU board. According to 1991 discussion here
> > on the 2200B, there is also mention of the system not really having an
> > instruction set, BASIC was all it could do since it was "hard
wired."
>
> Section 4 of the "2200 Systems Maintenance Manual" here:
>
> http://www.wang2200.org/docs.html
>
...contains the theory of operation of the CPU.
Subsection 4.2 is the
"General Instruction Set Description." The BASIC interpreter is contained
> in ROM providing 20-bit instructions that are executed by the hardware.
>
> The "Wang 2200 CPU schematics" here:
>
> http://www.wang2200.org/schematics.html
>
> ...show that the ALU is a single 74181, implying essentially a 4-bit
> processor.
>
> -- Dave
>
>
5 May
5 May
3:42 p.m.
On Sun, 4 May 2025, Steve Lewis wrote:
No, Steve is right. IBM used the term "microcode" for the normal CPU
instruction set (at least for the PALM processor).
Christian
Anyway, all I
mean is, in early 70s did "microcode" just mean
instruction-set, and that changed a few years later? Or did microcode
always mean some kind of "more primitive sequence" used to construct into
an instruction set?
The latter, as far as I know. And in "horizontal
microcode" you have a
4 May
4 May
11:13 p.m.
There can also be nanocode where code drives microcode drives nanocode.
http://www.easy68k.com/paulrsm/doc/dpbm68k1.htm gives an exposition of nanocode used below
microcode in the 68000 and also examples of vertical and horizontal microcode. Paul Konig
has just posted on the V H distinction - I shall not duplicate beyond emphasising that
microcode is an overloaded term, compare : i64 usage, horizontal, vertical,
"normal" people's usage
It is arguable that code, state machines and microcode are "the same thing";
that is they are all logical sequential engines. To differentiate, I shall ofer the view
that you change code 4 times an hour, microcode 4 times a day and state machines once a
year. Another differentiator of microcode from state machines is that it is usually held
in RAM, although the old men often used PROMs for production and speed.
These days microcode works well in FPGAs, RAM access times of 3 ns without pipelining, and
as Xilinx BRAM comes in 1k Wd x 36b quanta eg 108 bits. BRAM and DSP resource permits
implementation of pretty much any (array of) mills. And the architecture can provide a
plurality of parallel memories and address generators. The sort of things which were
conveiveable but probably not implementable in the bit slice days.
Dropping down the stack to the original sequential software / parallel hardware question
Superscalar architectures represent a hybrid aproach, multiple mills potentially tailored
to the task, scope for dynamic resource resolution and the heavy lifting of scheduling
micro-operations handled by the compiler back end / code generator; see eg
https://en.wikipedia.org/wiki/Superscalar_processor#:~:text=Superscalar%20C….
Interestingly, Synopsis have a toolset, asip-designer, which implements superscalar
architectures; see eg
https://www.synopsys.com/designware-ip/processor-solutions/asips-tools.html Unless I am
mistaken, the AI engines provided in Xilinx's ACAP range use this technology. In any
case, you can get FPGAs with an array of superscalar processors; see eg
https://adaptivesupport.amd.com/s/article/1132493?language=en_US
A final point is that most of the old mens techniques remain current, Wilkes used
microcode ~1950. What changes, is the price point at which you can reduce to practice.
Martin
-----Original Message-----
From: Steve Lewis via cctalk [mailto:cctalk@classiccmp.org]
Sent: 04 May 2025 20:06
To: General Discussion: On-Topic and Off-Topic Posts <cctalk(a)classiccmp.org>
Cc: Steve Lewis <lewissa78(a)gmail.com>
Subject: [cctalk] Re: Wang TTL BASIC
The IBM5100 also uses the term "microcode" - but I'm not sure if that term
pre-1975 means the same as what, say, Intel used it for around the x86?
I've seen a glimpse into the syntax of the x86 microcode. In the IBM
5100's case, its CPU is distributed across 14 or so SLT chips - so I never
fully understood how it implements its PALM instruction set. I know the
two large IC on that process are two 64-byte memory things (dunno if categorized as SRAM
or DRAM, or neither), mapped to the first 128 bytes of system RAM (so a high speed pass
through, where that 128 bytes correspond to the registers used by each of the 4 interrupt
levels). That PALM processor was developed right around the time of the Intel 4004 (late
'71 / mid '72), and stout enough to run a version of APL about a year later (I
see Intel made a version of FORTRAN for the 8008, or at least a claim for it in the
Intertec brochures).
Anyway, all I mean is, in early 70s did "microcode" just mean instruction-set,
and that changed a few years later? Or did microcode always mean some kind of "more
primitive sequence" used to construct into an instruction set?
-Steve
On Sun, May 4, 2025 at 1:33 PM ben via cctalk <cctalk(a)classiccmp.org> wrote:
On 2025-05-04 2:11 a.m., jos via cctalk wrote:
Well for BASIC that is true.
The Fairchild Symbol Computer was test to just how far TTL could go.
> I recall that system had many boards, the
whole "CPU" box was
> external
to
the
monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build a processor with some TTL, and then implement a BASIC on
that microprocessor.
There is always this intermediate step, no machine executes BASIC
directly in TTL.
Look here for an example of a processor
(Datapoint 2200) in TTL :
https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.
pdf
Jos
Micocoded coded machines, could likely be programed to run basic.
Ben.
5 May
5 May
3:28 a.m.
On 2025-05-04 3:13 p.m., Martin Bishop via cctalk wrote:
These days microcode works well in FPGAs, RAM access
times of 3 ns without pipelining, and as Xilinx BRAM comes in 1k Wd x 36b quanta eg 108
bits. BRAM and DSP resource permits implementation of pretty much any (array of) mills.
And the architecture can provide a plurality of parallel memories and address generators.
The sort of things which were conveiveable but probably not implementable in the bit slice
days.
FPGA logic is too vendor specific to have portable code. who needs 3 ns
when 5 volt logic levels and simple packaging are more important in my
mind when it comes to vintage equipment.
http://fpgaretrocomputing.org/pdp4x/
Can we still get the chips?
I was thinking of the western digital chip set, that had the PDP 11 or
Pascal in microcode. A version of BASIC could have been developed, had
not Microsoft cornered the basic market.
A final point is that most of the old mens techniques
remain current, Wilkes used microcode ~1950. What changes, is the price point at which
you can reduce to practice.
Martin
Here is $10.00 bribe to support RISC.
Ben.
10:06 a.m.
Ocht ...
Ben >> "FPGA logic is too vendor specific to have portable code. who needs 3 ns
when 5 volt logic levels and simple packaging are more important in my mind when it comes
to vintage equipment."
Not if you write in VHDL / Verilog, the instantiated lumps (eg memory) will be different
but no more than the API between M$ and Borland C.
And if your interest is in vintage architecture rather than vintage hardware, 5V logic has
little relevance.
Ben >> " Can we still get the chips?"
The narrow answer is given the source VHDL/Verilog you don't need legacy silicon.
Taking DG Conway's PDP/4 as an example the XC4010 is probably no more obtanium than a
DS8641, and the Spartan family is only now going out of production.
Ben >> " I was thinking of the western digital chip set, that had the PDP 11 or
Pascal in microcode."
Acording to goo's AI the Intersil 6100 and Harris HD6120 both implemented a PDP-8 on a
chip; IIRC microcoded.
And IIRC the DEC T-11 chip was also microcoded with an 8 bit data path.
Martin
-----Original Message-----
From: ben via cctalk [mailto:cctalk@classiccmp.org]
Sent: 05 May 2025 01:28
To: cctalk(a)classiccmp.org
Cc: ben <bfranchuk(a)jetnet.ab.ca>
Subject: [cctalk] Re: Wang TTL BASIC
On 2025-05-04 3:13 p.m., Martin Bishop via cctalk wrote:
These days microcode works well in FPGAs, RAM access
times of 3 ns without pipelining, and as Xilinx BRAM comes in 1k Wd x 36b quanta eg 108
bits. BRAM and DSP resource permits implementation of pretty much any (array of) mills.
And the architecture can provide a plurality of parallel memories and address generators.
The sort of things which were conveiveable but probably not implementable in the bit slice
days.
FPGA logic is too vendor specific to have portable code. who needs 3 ns when 5 volt logic
levels and simple packaging are more important in my mind when it comes to vintage
equipment.
http://fpgaretrocomputing.org/pdp4x/
Can we still get the chips?
I was thinking of the western digital chip set, that had the PDP 11 or Pascal in
microcode. A version of BASIC could have been developed, had not Microsoft cornered the
basic market.
A final point is that most of the old mens techniques
remain current, Wilkes used microcode ~1950. What changes, is the price point at which
you can reduce to practice.
Martin
Here is $10.00 bribe to support RISC.
Ben.
6:55 p.m.
Not if you write in VHDL / Verilog, the instantiated
lumps (eg memory) will be different but no more than the API between M$ and Borland C.
I refuse to those poorly designed languages, for the the reason I can't
figure out what is compiled, or where it is defined.
I have used ADHL and WINCUPL, both easy to figure out. They also came
free, like schematic capture rather than 10K year license for the name
brand stuff. Even PAL's could be designed by hand.
You can't even get a get a netlist with modern software. Why no one ever
used the one of the many RTL langues I will will never know.
And if your interest is in vintage architecture rather
than vintage hardware, 5V logic has little relevance.
Both,but 5 volt IO is still important since I like to use classic chips
like the 6850 or TIL311's or have slow BUS.
Ben >> " Can we still get the chips?"
The narrow answer is given the source VHDL/Verilog you don't need legacy silicon.
Taking DG Conway's PDP/4 as an example the XC4010 is probably no more obtanium than a
DS8641, and the Spartan family is only now going out of production.
More the case, only high tech PCB designs are permitted now days- 4+
layer, surface mount,BGA packages. I still am the kitchen table guy for
hardware. The only reason I can do any kind of hobby stuff is because of
the low cost chinese PCB's, and Kicad has PLCC socket footprints.
Ben.
"It is more fun to talk with someone who doesn't use long, difficult
words but rather short, easy words like, 'What about lunch?'"
—Winnie the Pooh
4 May
4 May
11:51 p.m.
From all I have seen, Maurice Wilkes is considered the inventor of "microcode"
as we know it. In the linked paper from 1951 he uses the term
"micro-programme", so I think it is safe to say microcode was used in the same
way in the 70s as it is today, although surely some people used it for normal machine
code. I have seen examples of that, although none come immediately to mind.
https://www.cs.princeton.edu/courses/archive/fall09/cos375/BestWay.pdf
Will
On 05/04/2025 4:05 PM EDT Steve Lewis via cctalk
<cctalk(a)classiccmp.org> wrote:
The IBM5100 also uses the term "microcode" - but I'm not sure if that term
pre-1975 means the same as what, say, Intel used it for around the x86?
I've seen a glimpse into the syntax of the x86 microcode. In the IBM
5100's case, its CPU is distributed across 14 or so SLT chips - so I never
fully understood how it implements its PALM instruction set. I know the
two large IC on that process are two 64-byte memory things (dunno if
categorized as SRAM or DRAM, or neither), mapped to the first 128 bytes of
system RAM (so a high speed pass through, where that 128 bytes correspond
to the registers used by each of the 4 interrupt levels). That PALM
processor was developed right around the time of the Intel 4004 (late '71 /
mid '72), and stout enough to run a version of APL about a year later (I
see Intel made a version of FORTRAN for the 8008, or at least a claim for
it in the Intertec brochures).
Anyway, all I mean is, in early 70s did "microcode" just mean
instruction-set, and that changed a few years later? Or did microcode
always mean some kind of "more primitive sequence" used to construct into
an instruction set?
-Steve
On Sun, May 4, 2025 at 1:33 PM ben via cctalk <cctalk(a)classiccmp.org> wrote:
> On 2025-05-04 2:11 a.m., jos via cctalk wrote:
> >> I recall that system had many boards, the whole "CPU" box was
external
> to
> >> the monitor (and in the earliest versions, the power supply was also a
> >> large external box). I can't really fathom creating a BASIC out of
raw
> >> TTL, or maybe I'm misunderstanding the approach.
> > You build a processor with some TTL, and then implement a BASIC on that
> > microprocessor.
> > There is always this intermediate step, no machine executes BASIC
> > directly in TTL.
> >
> Well for BASIC that is true.
> The Fairchild Symbol Computer was test to just how far TTL could go.
>
> > Look here for an example of a processor (Datapoint 2200) in TTL :
> >
> >
> https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.pdf
> >
> > Jos
> Micocoded coded machines, could likely be programed to run basic.
>
> Ben.
>
>
You just can't beat the person who never gives up.
Babe Ruth
5 May
5 May
12:04 a.m.
Will Cooke wrote " although surely some people used it for normal machine code
"
Anyone without knowledge of microcode, in the sense it is being discussed here, since at
least the mid 70's would assume you were talking about code for a 6800, PIC or
whatever uP/uC.
Saying "I have just upissued the microcode" is quite a good differentiator of
folks computing knowledge.
Martin
-----Original Message-----
From: Will Cooke via cctalk [mailto:cctalk@classiccmp.org]
Sent: 04 May 2025 21:52
To: General Discussion: On-Topic and Off-Topic Posts <cctalk(a)classiccmp.org>
Cc: wrcooke(a)wrcooke.net
Subject: [cctalk] Re: Wang TTL BASIC
From all I have seen, Maurice Wilkes is considered the inventor of "microcode"
as we know it. In the linked paper from 1951 he uses the term
"micro-programme", so I think it is safe to say microcode was used in the same
way in the 70s as it is today, although surely some people used it for normal machine
code. I have seen examples of that, although none come immediately to mind.
https://www.cs.princeton.edu/courses/archive/fall09/cos375/BestWay.pdf
Will
On 05/04/2025 4:05 PM EDT Steve Lewis via cctalk
<cctalk(a)classiccmp.org> wrote:
The IBM5100 also uses the term "microcode" - but I'm not sure if that
term
pre-1975 means the same as what, say, Intel used it for around the x86?
I've seen a glimpse into the syntax of the x86 microcode. In the IBM
5100's case, its CPU is distributed across 14 or so SLT chips - so I never
fully understood how it implements its PALM instruction set. I know the
two large IC on that process are two 64-byte memory things (dunno if
categorized as SRAM or DRAM, or neither), mapped to the first 128
bytes of system RAM (so a high speed pass through, where that 128
bytes correspond to the registers used by each of the 4 interrupt
levels). That PALM processor was developed right around the time of
the Intel 4004 (late '71 / mid '72), and stout enough to run a version
of APL about a year later (I see Intel made a version of FORTRAN for
the 8008, or at least a claim for it in the Intertec brochures).
Anyway, all I mean is, in early 70s did "microcode" just mean
instruction-set, and that changed a few years later? Or did microcode
always mean some kind of "more primitive sequence" used to construct
into an instruction set?
-Steve
On Sun, May 4, 2025 at 1:33 PM ben via cctalk <cctalk(a)classiccmp.org> wrote:
> On 2025-05-04 2:11 a.m., jos via cctalk wrote:
> >> I recall that system had many boards, the whole "CPU" box was
> >> external
> to
> >> the monitor (and in the earliest versions, the power supply was also a
> >> large external box). I can't really fathom creating a BASIC out of
raw
> >> TTL, or maybe I'm misunderstanding the approach.
> > You build a processor with some TTL, and then implement a BASIC on
> > that microprocessor.
> > There is always this intermediate step, no machine executes BASIC
> > directly in TTL.
> >
> Well for BASIC that is true.
> The Fairchild Symbol Computer was test to just how far TTL could go.
>
> > Look here for an example of a processor (Datapoint 2200) in TTL :
> >
> >
> https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_m
> b.pdf
> >
> > Jos
> Micocoded coded machines, could likely be programed to run basic.
>
> Ben.
>
>
You just can't beat the person who never gives up.
Babe Ruth
3:35 a.m.
Maurice Wilkes - by chance any relation to Mary Allen Wikes (of LINC-8
fame) ?
On Sun, May 4, 2025 at 5:08 PM Will Cooke via cctalk <cctalk(a)classiccmp.org>
wrote:
From all I have seen, Maurice Wilkes is considered the
inventor of
"microcode" as we know it. In the linked paper from 1951 he uses the term
"micro-programme", so I think it is safe to say microcode was used in the
same way in the 70s as it is today, although surely some people used it for
normal machine code. I have seen examples of that, although none come
immediately to mind.
https://www.cs.princeton.edu/courses/archive/fall09/cos375/BestWay.pdf
Will
On 05/04/2025 4:05 PM EDT Steve Lewis via cctalk
<cctalk(a)classiccmp.org>
wrote:
The IBM5100 also uses the term "microcode" - but I'm not sure if that
term
pre-1975 means the same as what, say, Intel used
it for around the x86?
I've seen a glimpse into the syntax of the x86 microcode. In the IBM
5100's case, its CPU is distributed across 14 or so SLT chips - so I
never
fully understood how it implements its PALM
instruction set. I know
the
two large IC on that process are two 64-byte
memory things (dunno if
categorized as SRAM or DRAM, or neither), mapped to the first 128 bytes
of
system RAM (so a high speed pass through, where
that 128 bytes correspond
to the registers used by each of the 4 interrupt levels). That PALM
processor was developed right around the time of the Intel 4004 (late
'71 /
mid '72), and stout enough to run a version
of APL about a year later (I
see Intel made a version of FORTRAN for the 8008, or at least a claim for
it in the Intertec brochures).
Anyway, all I mean is, in early 70s did "microcode" just mean
instruction-set, and that changed a few years later? Or did microcode
always mean some kind of "more primitive sequence" used to construct into
an instruction set?
-Steve
On Sun, May 4, 2025 at 1:33 PM ben via cctalk <cctalk(a)classiccmp.org>
wrote:
> On 2025-05-04 2:11 a.m., jos via cctalk wrote:
> >> I recall that system had many boards, the whole "CPU" box was
external
> to
> >> the monitor (and in the earliest versions, the power supply was
also a
> >> large external box). I can't
really fathom creating a BASIC out
of raw
> >> TTL, or maybe I'm
misunderstanding the approach.
> > You build a processor with some TTL, and then implement a BASIC on
that
> > microprocessor.
> > There is always this intermediate step, no machine executes BASIC
> > directly in TTL.
> >
> Well for BASIC that is true.
> The Fairchild Symbol Computer was test to just how far TTL could go.
>
> > Look here for an example of a processor (Datapoint 2200) in TTL :
> >
> >
>
https://bitsavers.org/pdf/datapoint/2200/jdreesen_shematics/DP2200_mb.pdf
> >
> > Jos
> Micocoded coded machines, could likely be programed to run basic.
>
> Ben.
>
>
You just can't beat the person who never gives up.
Babe Ruth
2:41 p.m.
On May 4, 2025, at 5:51 PM, Will Cooke via cctalk
<cctalk(a)classiccmp.org> wrote:
From all I have seen, Maurice Wilkes is considered the inventor of "microcode"
as we know it. In the linked paper from 1951 he uses the term
"micro-programme", so I think it is safe to say microcode was used in the same
way in the 70s as it is today, although surely some people used it for normal machine
code. I have seen examples of that, although none come immediately to mind.
https://www.cs.princeton.edu/courses/archive/fall09/cos375/BestWay.pdf
From what I understand, the Dutch computer ZEBRA (a Dutch acronym for "very simple
binary computer") by van der Poel is, in a way, a machine in which horizontal
microprogramming is the way that regular programs are written. I haven't looked at it
in detail but the impression I got is that it uses the horizontal microprogram approach of
controlling individual elements of the machine concurrently by the various fields of the
instruction word, rather than defining "normal" instructions that perform a
single conceptual action at a time. That machine actually predates the Wilkes paper.
https://en.wikipedia.org/wiki/ZEBRA_(computer) has more.
paul
4 May
4 May
4:26 p.m.
On 03/05/2025 23:18, Steve Lewis via cctalk wrote:
Is anyone out there familiar with the Wang 2200
BASIC? Of about 1973/1974
I worked on them for a couple of years back in the day. Still carry the
trauma.
My question is, was its basically really
"built" using TTL logic/chips?
The system didn't really have a microprocessor (neither did the early
Alto, right?)
So your question isn't really about the BASIC, I guess, but about the
hardware?
I recall that system had many boards, the whole
"CPU" box was external to
the monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build up a CPU (and the rest) from TTL, just like before that you
would have built it from discrete transistors or even tubes. All a
microprocessor is is just a bunch of TTL-like MOS logic circuits
(made of metal oxide semiconductor elelements) combined on one chip.
Julf
7:36 p.m.
I get that, that a general purpose processor with a particular instruction
set can be made up from TTLs (or vacuum tubes, or water sleuths, or metal
gears, etc), and am familiar with the Datapoint (and it always was odd to
me that Wang called their model the 2200 like the Datapoint 2200; I know
both companies had various models).
But aren't modern ASICs essentially that idea of
software-implemented-in-hardware, mainly for dedicated performance? If
you had "perfected" your software and accepted no code change was
necessary, the coding did exactly whatever it is you needed to do, you can
then commit that to some combination of hardware-logic-gate-stuff (for the
sake of executing it wicked-fast, just as modern specialized crypto-ASICs
do) ? I just had the impression Wang was doing some early form of this,
as they referred to their BASIC as "hard-wired." Or in other words, you
can't point to a single chip and say "there is the Wang BASIC ROM" (but
I'm
speculating, hence the question to try to clarify on their pre-1974 systems)
-Steve
On Sun, May 4, 2025 at 9:33 AM Johan Helsingius via cctalk <
cctalk(a)classiccmp.org> wrote:
On 03/05/2025 23:18, Steve Lewis via cctalk wrote:
Is anyone out there familiar with the Wang 2200
BASIC? Of about
1973/1974
I worked on them for a couple of years back in the day. Still carry the
trauma.
My question is, was its basically really
"built" using TTL logic/chips?
The system didn't really have a microprocessor (neither did the early
Alto, right?)
So your question isn't really about the BASIC, I guess, but about the
hardware?
I recall that system had many boards, the whole
"CPU" box was external to
the monitor (and in the earliest versions, the power supply was also a
large external box). I can't really fathom creating a BASIC out of raw
TTL, or maybe I'm misunderstanding the approach.
You build up a CPU (and the rest) from TTL, just like before that you
would have built it from discrete transistors or even tubes. All a
microprocessor is is just a bunch of TTL-like MOS logic circuits
(made of metal oxide semiconductor elelements) combined on one chip.
Julf
7:42 p.m.
On 04/05/2025 19:36, Steve Lewis wrote:
But aren't modern ASICs essentially that idea of
software-implemented-
in-hardware, mainly for dedicated performance?
I would think of it more as "hardware assisted software" - figure out
what parts are especially critical for performance and implement as
much of that in hardware.
If you had "perfected"
your software and accepted no code change was necessary, the coding did
exactly whatever it is you needed to do, you can then commit that to
some combination of hardware-logic-gate-stuff (for the sake of executing
it wicked-fast, just as modern specialized crypto-ASICs do)?
Sure. But while that works well for specialized algorithms typical
of crypto, it is hard to do for a more general case.
I just
had the impression Wang was doing some early form of this, as they
referred to their BASIC as "hard-wired." Or in other words, you can't
point to a single chip and say "there is the Wang BASIC ROM" (but I'm
speculating, hence the question to try to clarify on their pre-1974 systems)
If seem to remember that they were "hard-wired" in the sense that the
keywords were tokenized early, and transmitted to the CPU as tokens.
Julf
7:57 p.m.
On May 4, 2025, at 1:36 PM, Steve Lewis via cctalk
<cctalk(a)classiccmp.org> wrote:
I get that, that a general purpose processor with a particular instruction
set can be made up from TTLs (or vacuum tubes, or water sleuths, or metal
gears, etc), and am familiar with the Datapoint (and it always was odd to
me that Wang called their model the 2200 like the Datapoint 2200; I know
both companies had various models).
But aren't modern ASICs essentially that idea of
software-implemented-in-hardware, mainly for dedicated performance? If
you had "perfected" your software and accepted no code change was
necessary, the coding did exactly whatever it is you needed to do, you can
then commit that to some combination of hardware-logic-gate-stuff (for the
sake of executing it wicked-fast, just as modern specialized crypto-ASICs
do) ?
Somewhat, but mostly not I think. The key point is that software is roughly sequential at
the conceptual level. Even with threading that's true for each thread. In the
hardware various things happen concurrently or even out of order, but the hardware does a
large amount of hard work to make that invisible. When it fails to get that right the
results can be interesting -- consider the Intel security bugs caused by speculative
execution.
An ASIC tends to do many things in parallel. When you look at a design language like VHDL
that's very obvious, and things look quite different from conventional programming
languages precisely for that reason. That means an ASIC implementation of a software
algorithm is likely to look quite different also, at least if it wants to take advantage
of all the potential speed-ups from casting things in silicon.
Consider DSP -- "Software defined radios" implement a DSP signal processing path
in software. And these have significant limitations because even very fast processors
struggle to do DSP operations at high frequency. In an FPGA you can go very much faster
because you can take each of the processing elements and implement them as a separate
block, and many of those can be futher pipelined. FPGAs aimed at doing DSP things will
often contain hundreds or even thousands of multipliers exactly for that reason.
paul
8:59 p.m.
On Sun, May 4, 2025 at 12:43 PM Steve Lewis via cctalk
<cctalk(a)classiccmp.org> wrote:
I just had the impression Wang was doing some early
form of this,
as they referred to their BASIC as "hard-wired." Or in other words, you
can't point to a single chip and say "there is the Wang BASIC ROM" (but
I'm
speculating, hence the question to try to clarify on their pre-1974 systems)
It seems to just be 16K BASIC in ROM as far as I can see.
They describe it as MICROCODE and the Wikipedia article talks about
how the microcode implemented the instructions for BASIC thus
providing an abstraction layer that later allowed replacing the native
hardware underneath while retaining compatibility. But then that's
what any BASIC interpreter does really isn't it?
From their 1974 ad (image in the Wikipedia article) they say "...you
get a CPU with 16K bytes of BASIC language instructions hardwired into
the electronics" then in the next paragraph "The hardwired MOS ROM
language..." so honestly, I don't see how any of this is any different
than a conventional microcomputer with BASIC in ROM.
I think the rest is just awkward market-speak because what they are
describing hadn't really been done before so the terminology was still
up in the air as to what to call it. If they released it five years
later, they would probably just have said "computer with 16K BASIC in
ROM" because that's what it is.
9:21 p.m.
On Sun, May 4, 2025 at 1:59 PM I wrote:
They describe it as MICROCODE...
I mean, it probably IS microcode in the sense that without it the CPU
may not actually do anything because it's just a bunch of resources
which the bits in the microcode call into action to implement an ISA.
So that 16K of MOS ROM is probably implementing an instruction set,
implementing the BASIC runtime using that instruction set, and
implementing the BASIC interpreter application with all the associated
user-interface, parsing, etc.
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