[cctalk] Re: RP2350 5V Input Tollerant Pins

Adrian The summary answer to your questions must be "in general no" : 5V CMOS levels are quite different from TTL levels and open drain /collector signalling is inherently slow. 5V CMOS, with its very high Vih (typ > 3.5V), is one of those things it is nice not to have to work with. If you do have to drive it then, in general, logic (level) translation families are necessary. Contrariwise, 3v3 LVTTL and 5V TTL thresholds are essentially equal Vil at 0v8 and Vih at 2V. However, 5V pull ups and transients make 5V --> 3v3 connections an invitation to smoking : YMMV. If you have a specific interfacing problem, the essential information to select a way ahead is source chip, sink chip, signal speed, and constraints. The can being kicked in this thread was the RP2050's 5V tollerant input, which should make it useable for direct connection to TTL, then some apparent "documentation" issues were identified ... Some "handy primers" are: https://www.ti.com/lit/pdf/sdyu001?keyMatch=logic%20families&tisearch=u… see page 4 for typ logic levels https://www.ti.com/lit/pdf/ssztc76?keyMatch=logic%20families&tisearch=u… https://www.ti.com/lit/pdf/scyt129?keyMatch=little%20logic&tisearch=uni… https://www.ti.com/lit/pdf/scyb018?keyMatch=voltage%20level%20translation%2… Martin -----Original Message----- From: Adrian Godwin [mailto:artgodwin@gmail.com] Sent: 30 July 2025 21:33 To: General Discussion: On-Topic and Off-Topic Posts <cctalk(a)classiccmp.org> Cc: Martin Bishop <mjd.bishop(a)emeritus-solutions.com>om>; Paul Koning <paulkoning(a)comcast.net> Subject: Re: [cctalk] Re: RP2350 5V Input Tollerant Pins What about output pins in open-drain mode with a 5V pullup ? Can they provide a 5V CMOS-compatible output ? On Wed, Jul 30, 2025 at 9:40 PM Paul Koning via cctalk <cctalk(a)classiccmp.org> wrote: