Bob Grabau <rgrabau1(a)verizon.net> write:
> As my memory serves, there was a class given by the Southern
> California Computer Society (SCCS) in which the disassembled the
> Altair Basic (not sure if it was the 4k or 8k version) and used the
> output of that disassembly for the class. There was a guy who had the
> complete annotated (by the class) of the source as printed out copies
> in his trunk, which he just handed out to anyone that asked for it.
> This was somewhere between 1975-1978 (76-77 most likely) when I was a
> member of SCCS.
I was part of that disassembly effort and remember it well! I'm pretty
sure I still have my copy of it stashed away here. It was a lot of
fun. I had been a very early (1974) user of the 8080 at NCR, and
this gave me a chance to contribute to the knowledge base.
One thing I intend to do with this listing is find a piece of code
I worked to disassemble, and read the comments.
As I recall, it was part of some error handling. It consisted of a
string of three-byte instructions that did nothing important, but if you
jumped into the second byte of one, it would (as I recall) act as a
two-byte instruction and load a register with an error code. After
executing that 2/3 instruction, it fell into the remaining string of
three-byte instructions which did nothing of interest. At the end,
it would take the value that had been loaded earlier and use it.
I was simultaneously impressed and appalled by this space-saving
coding technique.
I'm disappointed that two printer pages are combined into a single
PDF page, as it makes it a bit difficult to read. Still, it is a
great window into the minds of Bill, Paul, and Monte.
Alan Frisbie
"Ancient BASIC dialects" seems like a rather small obscure domain
and as they say, they're not making any more of them. I'd think
that if you trained an AI on enough examples, they'd do much better.
The BASIC language isn't that complex compared to modern languages
where people are finding AI as a useful assistant, like it or not.
Think of it like old-school "pair programming" that gives you
a friend in your cube to talk to.
- John
I have a scan of the following:
LSI-11 BUS INTERFAE CHIPKIT/PROGRAM CONTROL DCK11-AA,-AC
October, 1977
Phil Champaigne
Logic Products
MR2-2/X6645
If someone is interested in a copy, preferably someone who can host
it, please contact me.
don
The why not use a UniBone comment has merit, what will your (FPGA)
> implementation add ?
>
Well,
I know the Unibone!
Surely is a very capable system for emulation of older hardware and
interfaces.
Also performances are good as far as I understand (I don't have one).
I have the idea of extending the concept of Unibone.
The new design shall be modular, composed by:
- a main board hosting the SoM and common interfaces (Ethernet, SD, USB,
console)
- a bus module for specific bus / machine: support could be added for DEC /
Data General / other?
- an interchangeable interface module for an hardware device (SMD, Pertec,
floppy, RX1/2, RL01/02, other).
Any kind of interface could be supported, also for example ADC, DAC, maybe
video to some limits...)
If you have main module and bus module, you have a similar solution to
Unibone / Qbone. However if you need to change bus type, you need to swap
only the bus adapter (cheaper).
If you have main and interfaces modules,
you can control physical devices directly,
and do anything with it. For example, you can dump / restore the content of
a SMD disk at bit level, no need to know the controller format, etc.
Similar to Kyroflux for floppy, but MUCH faster!
Alternatively, you could also emulate the device at low level (for example
a generic SMD disk).
If you have a set of main, bus and interface modules,
you can do anything as above, plus you can emulate a controller for a
specific machine for a specific device.
That said, implementing "anything" would be an infinite effort, but the
platform is flexible, so support could be added step-by-step.
So why an FPGA?
A programmable logic can implement a true digital circuit, where the PRUs
in the BeagleBone are processors. This means that in an FPGA the time is
always precisely determined by a clock, in PRUs it is affected by the
software execution.
This means that a PRU can work quite well on an asynchronous bus, provided
that sample rate is sufficient, even if not constant.
But for a fast synchronous interface, i.e. when time is determined by an
external clock, often embedded with data, no software approach can work
steadily in my opinion.
One thing is true: programming an FPGA is designing a netlist, not
developing a software.
It can be very hard to debug sometimes, because the approach is more
similar to repairing an old board with a Logic Analyzer than perform
debugging in software: it's a circuit in a chip, there no step-by-step
execution!
Nevertheless:
I'm a quite good electronic engineer,
highly experienced with digital logic and FPGA, so the hardware design
wouldn't be a problem. Just a matter of time.
Nowadays a SoM with a smaller AMD Zynq7010/7020 (a system-on-chip including
an FPGA, plus dual core CPU, lot of peripherals) doesn't cost a lot,
and have a great usage flexibility.
Also brute computing power is superior to older BB.
Why not try?
I'm open to your comments.
As for the UNIBUS unobtainable transceivers: I think the best solution is
to use AM26S10 for drivers, and an LVC logic powered at 3.3v for receivers.
Both are active parts costing nuts.
I would try this approach.
Andrea
