It's time to restore the 11/45.

[Noel Chiappa]

    > From: Jacob Ritorto

    > Can anyone understand and explain the unibus a / unibus b concept?

I've never personally worked on a machine with them separate, but the picture
on pg. 15 of the 11/45 Processor Handbook (1971 edition), and accompanying
text, should make what's going on pretty clear.

You have the 'normal' UNIBUS ("UNIBUS 1" they call it), controlled by the
11/45 CPU, on which regular memory, devices, etc live. The CPU also has
access, via a special path (I guess this was later named "FASTBUS"?), to two
_separate_ banks of high-speed memory. Those memories are _each_ dual ported;
one port to the CPU's direct path, the other to a second UNIBUS, ("UNIBUS 2").

So something on UNIBUS 2 could be talking to one bank of high-speed memory
while the 11/45 CPU talks to the other bank - while at the same time, a DMA
device on UNIBUS 1 could be talking to memory on UNIBUS 1. I.e. three
separate memory transfers all going on _completely_ simultaneously.

UNIBUS 2 does not have a 'bus master' - one has to be provided by plugging
some PDP-11 into it. One can either plug another PDP-11 into UNIBUS 2
(forming a primitive multi-processor, one in which the two machines share
access to the high-speed memory on the 11/45); or one can 'jumper' the two
UNIBI (is that the plural?) in the 11/45 together, at which point DMA devices
on UNIBUS 1 can do DMA into the high-speed memories (which they do not have
access to, if the two are separate).


The way grants, etc, work is pretty simple. (You can skip this part if you
don't care about the really gory details. :-) UNIBUS connectors include BGn
and NPG - in at one end of the cable/jumper, out at the other. So that short
section of UNIBUS 2 (it's actually just a chunk of the 11/45's main backplane)
can either have:

- a pair of UNIBUS cables (one in, one out) to make it part of some other
	machine's UNIBUS;
- one UNIBUS cables (in), and a terminator at the other end, to make it the
	last thing on that machine's UNIBUS;
- a UNIBUS jumpers (in) to make it part of the 11/45's UNIBUS, with the
	'out' UNIBUS connector on UNIBUS 2 leading to the rest of the
	11/45's UNIBUS

If you don't jumper UNIBI 1 and 2 together, the 'UNIBUS out' cable to the rest
of the 11/45's UNIBUS is plugged straight into the CPU's 'UNIBUS out' slot
(i.e. where the jumper would have plugged in if the two UNIBI were united).


    > Should I eliminate all this fancy bipolar and core memory and just use
    > an m7891?

For debugging, yes; simplest is always best. But if you have the fancy
bipolar or MOS (not core; the fast memory path only supports the first two),
don't pitch it, it's probably rare and unusual; and once you have the machine
running, you may want to play with getting it running.

    > If I did, would it be on the fastbus, unibus a or unibus b and would it
    > even matter?

Has to be on UNIBUS 1. (UNIBUS 2 becomes part of UNIBUS 1 if the two segments
are jumpered together.)

	Noel