How were 32-bit minis built in the 70s/80?

ben bfranchuk at
Sat May 11 20:30:18 CDT 2019

On 5/11/2019 6:28 PM, allison via cctalk wrote:

> Not all were 74181 based, Thats an early 1972 part and but 1975 it was
> already getting old though useful as it evolved to 74S and 74F series.
> The 82s100 and 105 series were out there and even by 1980 the AMD 2900C
> series was getting long in the tooth. Mask programable gate arrays were
> in the 1000 and up gate level by 1980 and growing by doubles every 6
> months to a year. Don't got get programmables like PAL/GAL logic.
> There was a lot of designs and even inside DEC you might see several
> approaches depending on what machine and the specific date.  For example
> the 780, 750 and 730 used very different technology.  I will not go into
> those that also went the ECL {10K, 100K, 1M families] route.

74181 is FAST, but I disagree with the way most computer architecture is
designed. You have a fast micro code cycle, that is out of sync with
main memory, that tries to emulate a Harvard? Memory model.
It looks fast only on paper or demo programs sadly.
The few schematics I have seen (PDP 8/11) have 74H logic hidden
inside so you can't say they are pure TTL logic.

  A cpu instruction has 4 parts in general
  a) getting the instruction and literal data from memory
  b) calculating the the effective address
  c) fetching the data from memory  c) ouputing data
  d) using the data d) saving to memory.

It is very hard to speed up this cycle because this has
sync to extenal memory. Memory is the bottleneck
is the true speed limit in any sytem. Add in virtual
memory and in multitasking and graphics
no wonder the PDP 8 at with TTL gives better response
PS: this message was delayed for about a minute as
background program froze the sytem.

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