Qbus split I&D?

[Paul Koning]

> On Mar 18, 2015, at 11:16 AM, Noel Chiappa <jnc at mercury.lcs.mit.edu> wrote:
> 
>> From: Paul Koning
> 
>> if the CPU generates an address in the range 17000000 to 17577777, it
>> lands on the Unibus and is then mapped by the Unibus map.
> 
> Umm, I think you meant "to 17 757 777", no? (Too many 7's - I find it helpful
> to break them up into groups of 3, the way DEC does, to prevent that kind of
> confustion.)

Oops.  Yes.
> 
>> More precisely, it works that way for 11/44 and 11/70 - but not for the
>> J-11. That's a difference not documented in the PDP-11 Architecture
>> handbook model differences table
> 
> But, but, but... the J-11 doesn't _have_ a UNIBUS map! Well, the 11/84 and
> 11/94 do, but not other J-11 machines. (And the Architecture Handbook table
> does not have separate columns for the 11/73, 11/84, etc.) So an 11/73 can't
> have a reference in the range 17 000 000 to 17 757 777 go out the UNIBUS -
> there isn't one! :-)

Correct, I meant J-11 Unibus systems.
> 
> 
> So what happens if one does a reference to something in the range 17 000 000
> to 17 757 777 on the 11/84? The 11/84 _does_ support having memory on the
> UNIBUS (up to 248KB), _but_ how it appears depends on how much there is. (See
> section 3.13.2, EK-1184-TM-PR2.) There's a special register to configure it
> (the 'KTJ11-B Memory Configuration Register', KMCR), which includes _how
> much_ UNIBUS memory there is.
> ...
> Basically, it seems like DEC was determined not to waste any address space on
> the J-11/UNIBUS machines. Either it's configured as UNIBUS memory, or it's
> PMI.

Interesting.  I was referring to what I learned by reading the RSTS/E memory size determination code.  That code says that the main memory limit is 2M - 128kW for 11/44 and 11/70, and 2M - 4kW for J-11 Unibus.  So it looks like RSTS/E doesn’t support the mixed case you mentioned, only the “just PMI” flavor.

	paul