DEC M452 module oscillator/ was Re: using new technology on old machines
Brent Hilpert
hilpert at cs.ubc.ca
Thu Jan 1 19:24:27 CST 1970
On 2015-Jun-17, at 7:31 AM, Dave G4UGM wrote:
>> From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Noel Chiappa
>>> From: Dave G4UGM
>>
>>> I found it easier to think of it in DC terms. So the Cap charges
>>> through R5 + R3 and R9 + R8.
>>> As the Cap charges the voltage on the base of Q1 rises until it turns
>>> on, which then turns on Q2.
>>> At this point the cap is then charged (or discharged) in the reverse
>>> direction via Q2, D5 and R4 until Q1 turns off.....
>>
>> I'm clearly never going to be any good at analog stuff! ;-) Even with what
>> looks (on the surface) to be a wonderfully clear explanation of how the
>> circuit works, I still can't really grok how it operates!
>>
>> I mean, I can tell from the polarity on the cap that the collector of Q2 must be
>> at a higher voltage than the base of Q1, but I am utterly failing to understand
>> how the cap discharges through Q2. And as the cap charges (i.e.
>> the voltage across it increases), how does the voltage on the base of Q1
>> increase - surely it must be decreasing (since it's tied to the negative side of
>> the cap, which is experiencing a voltage increase across itself)?
>
> I think the cap is mildly abused. I believe that it is reverse charged.
While I was at the bench working on another project I took a couple of minutes to breadboard the circuit (Q1-Q3), turns out it switches before the capacitor goes into reverse charge, so the cap does retain the proper polarisation throughout the charge/discharge operation cycle.
Experimented with separating R8/R9 into isolated emitter-bias and collector-load resistors, can still be made to oscillate but becomes more touchy, so I do suspect the particular oscillator design was chosen for stability, also considering a common flip-flop astable could have been in fewer components.
(Coincidentally, the other project was repairing one of those common flip-flop astables (master clock in a 1971 calculator) which was intermittent. Measurements ruled out the Rs as a problem, so narrowed it down to the two transistors and the two capacitors, at which point it became a question of shotgun replacing all 4 components versus trying to isolate it further. Tried individual hot / cold checking of the 4, the osc. rigorously stopped with heat applied to a 60pF ceramic cap and restarts after blowing it cool.)
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