24 Dec
2025
24 Dec
'25
5:08 p.m.
Can someone explain how the Intel 8008 (yes, the 8008, NOT the 8080!)
handled saving and restoring the flags during an interrupt?
The 8008 has four flag bits - CZS&P - but there doesn't seem to be any
explicit equivalent to the PSW register nor any "PUSH PSW" or "POP
PSW" type
instructions. Other than testing the flag bits with the JUMP/CALL/RET
instructions there doesn't seem to be any way to access them.
Interrupts work pretty much like the 8080 - during the interrupt response
the peripheral forces an instruction onto the bus, typically an RST opcode
but in theory it could be anything. RST and CALL however only appear to
save the PC on the internal stack, and RET only restores the PC. So how do
you save and restore the flag bits?
It seems like interrupts would be pretty much useless without this, so I
must be missing something.
Thanks,
24 Dec
24 Dec
8:23 p.m.
On 12/24/25 10:08, Robert Armstrong via cctalk wrote:
Can someone explain how the Intel 8008 (yes, the
8008, NOT the 8080!)
handled saving and restoring the flags during an interrupt?
The 8008 has four flag bits - CZS&P - but there doesn't seem to be any
explicit equivalent to the PSW register nor any "PUSH PSW" or "POP
PSW" type
instructions. Other than testing the flag bits with the JUMP/CALL/RET
instructions there doesn't seem to be any way to access them.
Interrupts work pretty much like the 8080 - during the interrupt response
the peripheral forces an instruction onto the bus, typically an RST opcode
but in theory it could be anything. RST and CALL however only appear to
save the PC on the internal stack, and RET only restores the PC. So how do
you save and restore the flag bits?
It seems like interrupts would be pretty much useless without this, so I
must be missing something.
Thanks,
The interrupt handler for 8008 has to save check the state of flags and save them before
doing any
other work and then restore the flags when complete. Here is the power-up/interrupt code I
use on a
board I built:
; the power-up reset and i8008 interrupt share the same start point
; check to see if it's a cold or warm reset/interrupt
rst1: ldh ;save H register in D register
lel ;save L register in E register
lhli intsav ;point to RAM save location
lma ;save A register
sav: lai 000 ;assume zero flag is set
jtz savc ;if true, get carry bit
lai 060 ;assume sign bit is zero (positive word)
jfs savc ;if true, get carry bit
lai 300 ;sign bit was set
savc: rar ;get carry bit
jtp savw ;jump if parity is even
xri 001 ;set parity odd
savw: inl ;point to next RAM byte
lma ;save flags byte
inl ;point to next RAM byte
lmb ;save B register
inl ;point to next RAM byte
lmc ;save C register
inl ;point to next RAM byte
lmd ;save H register
inl ;point to next RAM byte
lme ;save L register
lhli coldst ;read the cold/warm reset indicator
lam ;into A
cpi WFLAG ;compare with the value for warm
jtz warm ;it is a warm reset or interrupt
; cold start, perform one-time initialization
cold:
--tom
10:01 p.m.
Tom Uban <uban(a)ubanproductions.com> wrote:
Here is the power-up/interrupt code I use on a board I built: ...
Thanks! A couple of questions -
It looks like this code trashes DE, so I assume the background code just can't use
those registers? So there's no way to code a truly transparent ISR?
I also notice that the 8008 lacks any kind of interrupt enable F-F, nor any EI/DI type
instructions. Is that right? I guess you could always implement those with external
hardware, at least.
And the big question - what's your code for restoring these flags when you exit the
ISR? The MCS-8 manual says that all ALU instructions always update all flags, with the
exception of the rotate opcodes which only change carry. It seems that means the ZS&P
flags at least would have to be restored together in one instruction.
Bob
10:37 p.m.
I think the intent is for the interrupt hardware to insert a reset
instruction into the instruction fetch cycle.
for example.
main code
.
.
.
Save any registers that might be used by the interrupt routine
HLT
<Interrupt hardware inserts a RST Instruction>
Restore registers from before the interrupt
.
.
.
interrupt handler
<process interrupt>
RET (returns from interrupt)
It is the responsibility of the calling program to preserve any of the
registers that the interrupt handler might use prior to using the HLT
instruction.
Since the documentation does not state that the condition codes are
preserved by an interrupt any other method may cause incorrect program
operation.
On 12/24/2025 3:01 PM, Robert Armstrong via cctalk wrote:
Tom Uban
<uban(a)ubanproductions.com> wrote:
Here is the power-up/interrupt code I use on a board I built: ...
Thanks! A
couple of questions -
It looks like this code trashes DE, so I assume the background code just can't use
those registers? So there's no way to code a truly transparent ISR?
I also notice that the 8008 lacks any kind of interrupt enable F-F, nor any EI/DI type
instructions. Is that right? I guess you could always implement those with external
hardware, at least.
And the big question - what's your code for restoring these flags when you exit
the ISR? The MCS-8 manual says that all ALU instructions always update all flags, with
the exception of the rotate opcodes which only change carry. It seems that means the
ZS&P flags at least would have to be restored together in one instruction.
Bob
10:43 p.m.
When I did this, I remember there was a pair of registers that I could not save, probably
de. I can look and see if I ended up with useful isr code in my project. Maybe the real
Intended use is to be able to halt and resume on interrupt.
There was a way to cleverly restore the flags.
My isr code is in https://github.com/sbelectronics/h8/blob/master/h8-8008/asm/fpanisr.inc
Sent from my iPhone
On Dec 24, 2025, at 1:02 PM, Robert Armstrong via
cctalk <cctalk(a)classiccmp.org> wrote:
Tom Uban <uban(a)ubanproductions.com> wrote:
Here is the power-up/interrupt code I use on a board I built: ...
Thanks! A couple of questions -
It looks like this code trashes DE, so I assume the background code just can't use
those registers? So there's no way to code a truly transparent ISR?
I also notice that the 8008 lacks any kind of interrupt enable F-F, nor any EI/DI type
instructions. Is that right? I guess you could always implement those with external
hardware, at least.
And the big question - what's your code for restoring these flags when you exit the
ISR? The MCS-8 manual says that all ALU instructions always update all flags, with the
exception of the rotate opcodes which only change carry. It seems that means the ZS&P
flags at least would have to be restored together in one instruction.
Bob
10:52 p.m.
Also, there was a popular way to implement a stack on an io port, and I probably used that
in my project. That was documented in a magazine article (perhaps also the source of the
clever routines to save and restore the flags)
Scott
Sent from my iPhone
On Dec 24, 2025, at 1:44 PM, smbaker(a)gmail.com wrote:
When I did this, I remember there was a pair of registers that I could not save,
probably de. I can look and see if I ended up with useful isr code in my project. Maybe
the real Intended use is to be able to halt and resume on interrupt.
There was a way to cleverly restore the flags.
My isr code is in https://github.com/sbelectronics/h8/blob/master/h8-8008/asm/fpanisr.inc
Sent from my iPhone
>> On Dec 24, 2025, at 1:02 PM, Robert Armstrong via cctalk
<cctalk(a)classiccmp.org> wrote:
>>
>
>>
>> Tom Uban <uban(a)ubanproductions.com> wrote:
>> Here is the power-up/interrupt code I use on a board I built: ...
>
> Thanks! A couple of questions -
>
> It looks like this code trashes DE, so I assume the background code just can't
use those registers? So there's no way to code a truly transparent ISR?
>
> I also notice that the 8008 lacks any kind of interrupt enable F-F, nor any EI/DI
type instructions. Is that right? I guess you could always implement those with external
hardware, at least.
>
> And the big question - what's your code for restoring these flags when you exit
the ISR? The MCS-8 manual says that all ALU instructions always update all flags, with
the exception of the rotate opcodes which only change carry. It seems that means the
ZS&P flags at least would have to be restored together in one instruction.
>
> Bob
>
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Mike Katz -
Robert Armstrong -
smbaker＠gmail.com -
Tom Uban