13 Jun
2024
13 Jun
'24
3:40 p.m.
On 6/12/24 09:52, Jon Elson via cctalk wrote:
On 6/12/24 03:02, Peter Corlett via cctalk wrote:
AACK! Sorry, that was supposed to be F-16!
Jon
Fun factoid: despite modern x86 being clocked ~1000x
faster than ye olde
6502, there's not much in it between them when it comes
to interrupt
response time. If all goes well, x86 takes "only" a
hundred-ish cycles to do
its book-keeping and jump to the ISR, but if SMM is
active (spoiler: it
always is and you can't turn it off) then it introduces a
massive amount of
extra jitter and all bets are off.
Well, actually the Pentium classic was supposedly designed
as the flight computer for the F-15, and had VERY good
interrupt response time of around 5 us. We know all about
this as we used it with real time Linux in CNC motion
control systems. A big concern was what was the delay and
jitter from the RTC triggering an interrupt to when the
servo position counters were read. It has been a struggle
to maintain this level of low jitter with newer
processors, but we have found quite a few that can do it.