22 Apr
2024
22 Apr
'24
2:24 p.m.
On 4/22/24 14:04, Paul Koning wrote:
I never had my hands on a 6600, only a 6400 which is a
single unit machine. So I had to do some thinking to understand why someone would do a
register transfer with L (shift operation) rather than B (boolean operation) when I first
saw that in my code reading. The answer is that both instructions take 300 ns, but they
are in different functional units on the 6600 so they can start 100 ns apart.
Jack Neuhaus taught the timing course at SVLOPS, at least to the SSD
crowd. It got to be fun after awhile. We tried to do the same for the
STAR, but the timing was pretty complex and not a good subject for
pencil-and-paper work. There, the biggest performance gains there came
from vectorization.
Of course, if you had ECS, large block memory moves were easy. Lower
CYBER (e.g. 73) with CMU might have also benefited from its use; I don't
recall if it was used for storage move early on. I do recall that the
standard test for CMU presence packing a jump in the lower 30 bits of a
ginned-up CMU instruction word was broken by the Cyber 170.
--Chuck