I have not studied the RP2350 datasheet closely (and I'm definitely not
an EE), but as I understand it, the caveat here is that 5V tolerance
only exists while the device is fully powered (IOVDD at 3V3). At lower
supply voltages (e.g. during startup), digital I/O pins may be damaged
by voltages higher than 3.3.
The topic is discussed in more depth here, and in linked threads:
https://forums.raspberrypi.com/viewtopic.php?t=375118
To bring this somewhat back around to cctalk, I faced this issue when
designing my console adapter for the PDP-11/05 (github
<https://github.com/jaylogue/pdp1105-console-adapter-v2>). It is based
on the rPI Pico (RP2040), which has a similar limitation. I wanted the
device to be able to be powered from the 11/05 itself. But at power on,
the supply voltage races with the SERIAL OUT (TTL) line, and always
looses due to the time it takes for the onboard 3V3 regulator to
stabilize. Since I cared more about simplicity than power efficiency or
speed, I went with a simple voltage divider rather than a level shifter.
--Jay
On 7/30/25 07:04, Martin Bishop via cctalk wrote:
https://www.raspberrypi.com/products/rp2350/
From postings, I know that folks use the RP2350 for interfacing; the trade press has
been shipping news of RP's rev A4 datasheet in volume.
The datasheet should tell all. However, the 5V tollerance of the "IO" pins is
significant for its simplification of TTL interfacing; the maximum supply and output
voltage remains 3v3. See section 14.8.2 (p 1335) et seq - NB the FT indication.
Martin