22 Apr
2024
22 Apr
'24
5:26 p.m.
On 4/22/24 09:54, Lamar Owen via cctalk wrote:
On 4/22/24 12:18, Chuck Guzis via cctalk wrote:
Interesting document. Ken also documents the K and V flags in the 8085.
I was aware of the use of the K flag with the 16-bit INX/DCX operations
as an over/underflow indicator for 16-bit inc-decrements. He also
points out that it comes into play with the usual 8-bit ALU operations.
https://www.righto.com/2013/02/looking-at-silicon-to-understanding.html
One question that I've long had is if the K flag is set in case of a
"wraparound" situation with the PC or stack pointer. I have never
checked that (and 8085 programming is in my dimming past), but I suspect
that it does indeed get set, since the "wrap" of those registers would
be pretty uncommon in normal-functioning code.
Managing underflow with a 16-bit decrement is certainly useful and can
cut out a few instructions to test that situation. However, the K flag
being restricted to the 8085 pretty much limits its use when viewed in
the universe of other x80 CPUs.
Somewhat akin to the packed BCD string instructions on the NEC V-series
CPUs. Useful? You bet--but not implemented on any of the strict Intel
hardware so left to molder away in a dusty corner.
--Chuck
I don't know if this applies to the Z80, but
on the 8080, 16-bit
increment/decrement is handled by a separate increment block (also used
to advance the P-counter and stack operations). Probably one of the
reasons that INX/DCX doesn't set any flags.
16-bit INC and DEC are indeed
handled by a separate block, which also
gets used to increment PC and decrement SP at the appropriate times.
Ken's page on the 4-bit ALU has a 'mapped' dieshot showing it. Ken
covers it operation in the blog article
https://www.righto.com/2013/11/the-z-80s-16-bit-incrementdecrement.html