31 Oct
2024
31 Oct
'24
5:39 p.m.
On Oct 31, 2024, at 11:41 AM, Chuck Guzis via cctalk
<cctalk(a)classiccmp.org> wrote:
On 10/31/24 07:35, Donald Whittemore via cctalk wrote:
I could imagine it in PPs, also in 6400 machines since they don't have an
"instruction stack" so instruction fetches would go to memory. For all of those
you'd end up hammmering a single memory cell at high speed, and each time you do that
you get a read and a write cycle, both of which inject some energy into the cores in
question.
In CDC's OS (NOS) the idle loop contains a couple of instructions which are fairly
slow, apparently with the specific intent to slow down memory references.
I remember a PDP-11 diagnostic called the "core heating test": it knows the
geometry of the core modules it was written for, and uses that knowledge to do lots of
memory cycles in a small physical region of the core so that section heats up. It them
moves around the core planes, looking for regions that are marginal and start misbehaving
when heated. It's a very slow test. I actually ran it once, mostly for grins; it
didn't fail.
paul
If I remember right I was told back in the early
70s by our IBM CE that physical damage could be done to our model 30 or 40 if we ran a
program that did an Assembler instruction, B * For those non-Assembler people that is
an instruction to branch to the location of the instruction. I think it might have caused
a heat problem in the core or CCROS or TROS.
Possible? Or is my 76 year old brain hallucinating?
I recall that sort of thing was an issue in the CDC 7600; it could throw
parity errors because of core heating. I believe that the problem was
in the PPUs, but it's been too many years to remember accurately.