22 Apr
2024
22 Apr
'24
8:28 p.m.
On 4/22/24 13:12, Fred Cisin via cctalk wrote:
Having done cycle accurate simulation of a pipelined superscalar
processor, I can assure you it's possible, particularly with hardware
assist a la Quickturn .
It's also a lot like watching paint dry.
--
Christian Kennedy, Ph.D.
chris(a)mainecoon.com AF6AP | DB00000692 | PG00029419
http://www.mainecoon.com PGP KeyID 108DAB97
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"Mr. McKittrick, after careful consideration…"
On Mon, 22 Apr 2024, Mike Katz via cctalk wrote:
[Big snip -- hopefully I managed to get attribution right, apologies in
advance if I borked it]
When I was working for a 6800 C compiler company
we could simulate
all 68000 CPUs before the 68020. The 68020 with it's pipelining and
branch prediction made it impossible to do cycle accurate timing.
Again, not impossible, but very likely not feasable.