[cctalk] Re: Classic computers with more than one stack pointer, but not FORTH machines.

What is the problem with ISRs running in a user stack? The ISR runs, exits, the stack is cut back, and net effect on the user's stack is zero. The Burroughs B6000/7000 (later Unisys A Series and now ClearPath MCP) systems did that, and it works fine. An interrupt acts like a hardware-induced procedure call. The user's state is pushed onto the stack, a new stack frame is started, and the interrupt routine runs in that, calling other OS procedures as necessary to do its job. If execution of the user task needs to be suspended, say to wait for an I/O, the OS moves the processor to another stack (there's a privileged instruction to do this). Once control returns to the original stack, the OS procedures eventually exit back into the interrupt routine, which exits back into the user's stack frame, with the hardware restoring the prior stack frame's state at each step. There are perhaps two significant differences with this architecture, though, that help to make this work. First, there are no user-accessible registers. All registers are dedicated to specific purposes, which is what allows the hardware to save and restore state automatically. Second, the stack on these machines is not part of the user's address space, it IS the user's address space. All push-down expression evaluation and call history is in the stack and is managed automatically by the hardware. All addressing is relative to the stack. Scalars are typically allocated in the stack. Arrays and other larger structures are allocated in separate segments elsewhere in memory and accessed through descriptor words in the stack. Procedure parameters are contained in the callee's stack frame and effectively become local variables for that environment. The instructions do not have memory addresses, not even virtual addresses. All addressing is in terms of offsets from the base of a stack frame or from the base memory address in a descriptor word. So the stack is not an afterthought made feasible by auto-incrementing a register. It's a central tenet of the architecture.