20 Jun
2024
20 Jun
'24
4:12 a.m.
On Thu, Jun 20, 2024 at 5:01 AM Eric Smith via cctalk <cctalk(a)classiccmp.org>
wrote:
This is ultimately part of a project to come up with a replacement
processing system for the HP 16700 family logic analyzers, which are based
on a 150 MHz PA-7300LC. Ultimately I'm hoping to control the logic
analayzer acquisition modules from a non-PA-RISC processor (e.g., x86), but
I want to tackle this in smaller steps, like making the software run on a
newer PA-RISC processor (the PA-8900 in the C8000). It's much easier to
start with a processor that at least has the same architecture, rather than
having to jump immediately into binary translation.
I'm interested in this. I'm looking at the bottom end, the bus and cards,
but there may be information we can share.