Piggybacking 74LS logic chips to confirm a suspected fault

Don North north at alum.mit.edu
Tue Dec 22 15:43:03 CST 2015

Or it is a mechanical fault due to a package/die bond wire becoming an open circuit.
This could happen to where the wire joins to either the package or the die pad, or
a wire that was fused due to excess current. Hard to tell unless you decap the 

On 12/22/2015 1:32 PM, Alexandre Souza wrote:
> Becaise they have diodes to gnd/vcc. And the common failure of a diode is a
> rupture of the barrier and so, it gets shorted. So the gate is shorted to
> ground or vcc
> Enviado do meu Tele-Movel
> Em 22/12/2015 19:29, "Chuck Guzis" <cclist at sydex.com> escreveu:
>> On 12/22/2015 01:10 PM, Alexandre Souza wrote:
>>> It works if the gate is open. But if it is shorted to gnd/vcc, you're
>>> in trouble :)
>> In my experience, this is the case with a lot of 4000-series CMOS. Don't
>> exactly understand why.
>> --Chuck

More information about the cctalk mailing list