Documentation for F11 Chipset?
Bjoren Davis
bdweb at mindspring.com
Mon May 3 14:44:59 CDT 2021
Hello Paul and Rob,
The next thing I did was to hook up a logic analyzer to the address
lines on the ROM. This told me how far I got with the boot sequence
before it restarted.
I disassembled the ROM and have some portions of it semi-decoded so that
may be helpful. If you like I can send you the text file I have.
Another helpful thing for me was to take the Xhomer emulator
https://xhomer.isani.org/xhomer/ and instrument it to give me a "good"
ROM boot sequence (correlated nicely with device accesses) and compare
that with what I saw with my logic analyzer.
That's how I figured out my ROM was failing to see an interrupt from the
EPCI (I think the ROM was running the EPCI in loopback mode) and so it
was resetting.
I have to say: the POST on the PC3XX is impressively thorough, but the
mechanism for reporting failures is absolutely atrocious (4 LEDs and, if
you're lucky, a cryptic octal error code on the screen).
I do have a functional 350 that I can instrument, so let me know if I
can help.
--Bjoren
On 5/3/2021 2:29 PM, Paul Koning via cctalk wrote:
>
>> On May 3, 2021, at 2:23 PM, Rob Jarratt via cctalk <cctalk at classiccmp.org> wrote:
>>
>> Sadly my machine is not at the point where I can attach a console of any kind. The CPU is being reset every 13us by a bus error. I am having trouble working out why though. I have got as far as working out that is the CT2 TIME OUT signal, but just why that is active isn't entirely clear to me. It would help to have a working machine to compare it to!
>>
>> Regards
>>
>> Rob
> That sounds like it's trying to access the boot ROM and not getting an answer.
>
> paul
>
>
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