PDP-11/70 debugging advice
Josh Dersch
derschjo at gmail.com
Wed Feb 3 22:07:58 CST 2021
On Tue, Feb 2, 2021 at 12:30 AM Josh Dersch <derschjo at gmail.com> wrote:
>
>
> On Sun, Jan 31, 2021 at 10:03 PM Fritz Mueller <fritzm at fritzm.org> wrote:
>
>>
>>
>> > On Jan 31, 2021, at 8:19 PM, Josh Dersch <derschjo at gmail.com> wrote:
>> > Well, what's interesting here is that on my system, switch S4 (MAINT
>> STPR) steps the processor with switches S1 and S2 set to *any*
>> configuration.
>>
>> Hmm, would expect to see S2:1 S1:0 step by microinstruction, and S2:1
>> S1:1 step by clock phase. The other two settings should free run the
>> microcode. So yeah, sounds like something fishy there... The TIG card has
>> more than a few analog components, and its not too unusual for these to get
>> hung up on the adjacent card and have a leg pulled or sheared from the
>> board.
>>
>> > Ah, and page II-6-20 (p. 178) indicates that when DCLO is asserted, it
>> asserts: "UBCE ROM INIT H - forces the ROM to ZAP.00 (200), and stops and
>> clears the Timing Generator and the Cache timing."
>>
>> Yup, that's one of the signals coming in to RAC E106. Probing there
>> should indicate which of possible sources for ZAP is actually occurring
>> (UBCE ROM INIT H on pins 2 and 3 there).
>>
>> DCLO is a classic... Make sure to 'scope it, because it sometimes has
>> troublesome spikes that don't show on a multimeter. If you have H742s,
>> there are some wet tantalums on the control board that sometimes leak and
>> cause trouble with this.
>>
>> I'm sure you are raring to go -- hope those fans show up for you
>> tomorrow, and will be interested to hear what you find!
>>
>
>
> Small update; fans arrived today and they are now installed. Voltages
> tested on the backplane at the points called out in the service docs, and
> all voltages dialed in to 5.05V. Ripple is within tolerances -- about
> 200mV with some very short spikes that barely show up on my 'scope that go
> to 300mV or so. Not sure if this is abnormal, I also saw these while
> burning the supplies in on the bench.
>
> Checked the AC LO and DC LO signals at all the points called out in figure
> 6-12 (p. II-6-22 of
> http://bitsavers.org/pdf/dec/pdp11/1170/EK-KB11C-TM-001_1170procMan.pdf)
> and appear to be correct. Looked at most of them under the scope and no
> spikes (other than those in the ripple from the power supply.)
>
> Tomorrow I'll get some boards out on extenders and take a look at what's
> going on at the logic level.
>
Another quick update: Had some time last night to poke at things. I
started with the TIG, since I wanted to see if the crystal clock was
running at all and if the right clock source was being selected. Sure
enough, TIGB XTAL H was a flat line. Nothing happening at the crystal
itself either. The crystal's casing was fairly corroded (which is
interesting, since nothing else on the board is) and after a tiny bit of
prodding one of the legs fell off, so I'm hoping that's the culprit. New
crystal ordered and when it arrives we'll see...
- Josh
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