Extremely CISC instructions
paulkoning at comcast.net
Tue Aug 24 08:12:18 CDT 2021
> On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk <cctalk at classiccmp.org> wrote:
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions for any CPU architecture that
> are unusually prolific in one way or another.
> Although I don't know it well, I suspect VAX will place well in one way or
Thinking some more about addressing modes, there are a couple of examples that are, if not extra complex, at least extra unusual.
The strangest addressing mode I ever saw is found on the Electrologica X1. It has the familiar indexed addressing mode called "B" mode, which uses the contents of B1 plus the address field of the instruction as the effective address. So far so good.
But then there is C mode, which is like B mode except that the computed effective address is written back into the address field of the instruction. It's used very rarely; one example is in the equivalent of "bzero" in the ALGOL compiler run-time code. With this mode, the address field is set to buffer address - n and the B register to n, for a stride of n. You can find a short example here: http://helloworldcollection.de/#Assembler%C2%A0(X1)
Its successor, the X8, drops this addressing mode, but it has some interesting quirks as well. There is a stack addressing mode, related to the indexed mode. In stack mode, if the displacement is negative the stack pointer is decremented by one, if positive it is incremented. So push and pop are not two modes, but happen depending on the specified offset. "MC=A" pushes A onto the stack; "A=MC[-1]" pops that value.
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