Extremely CISC instructions

[Paul Koning]

> On Aug 23, 2021, at 8:38 PM, Tom Stepleton via cctalk <cctalk at classiccmp.org> wrote:
> 
> Hello,
> 
> For the sake of illustration to folks who are not necessarily used to
> thinking about what computers do at the machine code level, I'm interested
> in collecting examples of single instructions for any CPU architecture that
> are unusually prolific in one way or another.
> ...
> Although I don't know it well, I suspect VAX will place well in one way or
> another.

Indeed. Just its addressing modes, with indirection and two separate register indexing operations, are hairy enough.  Then consider the decimal arithmetic instructions that might have up to 6 operands.

It also has instructions whose encoding isn't so exotic but what they do is.  The CRC instruction is one example, the POLY ones another.  Then there are the save and load process context instructions, which copy a rather large data structure full of different items between memory and the CPU privileged state.

Going back a decade or two we have the IBM 1620, in which arithmetic and I/O operations operate on variable length data.  That includes floating point (with variable length mantissa).  Want to use 40 digit float precision?  No problem, you're still just dealing with a single instruction to do the operation.  It might take a while, of course...

Not quite so extreme is the Exchange instruction on the CDC 6000 series machines, analogous to the VAX save/load process context instruction but with the two operations done together.  That is a big win in that era with core memory, because the whole operation is just one pass through the data structure, doing read of the new state and write back of the old state, 100 nanoseconds per word of state.  Unlike the VAX the state struct ("exchange packet") is relatively small, just 16 words.

	paul