UniBone: Linux-to-DEC-UNIBUS-bridge, year #1

[David Bridgham]

On 11/15/19 3:26 PM, Nigel Johnson via cctalk wrote:

> I think you will win a lot of friends if you can make something that
> will emulate MSCP devices on the QBus - I have a micro11 and microVax
> sans disk due to only having ESDI ate ST506 controllers!
>
> cheers es 73 to the hams amongst us de Nigel ve3id


Our initial disk controllers will be more old school, the RK11 and
RP11.  When we were first tossing around ideas, we considered MSCP but
put that into the "too complicated" bin to be considered later, maybe
much later.

Since then, the design for the QSIC has become more solid and a couple
implementation ideas come to mind.  One, kinda the obvious one, is to
just put it in the Soft-11.  In order to implement the USB protocol, we
decided we needed a processor and the "easy" way to do that was to just
put a soft processor inside the FPGA.  And for that processor, what
better than a PDP-11?  Okay, there might be other, better choices but no
other choice would be as good a hack.  So that's the current plan
although we haven't done it yet.  Could put the MSCP implementation into
there.

I've also been looking more into microcoding and bitslice designs and it
could be a really neat little project to build a bitslice processor into
the FPGA and microcode that to implement MSCP (rather than microcoding
it to be a PDP-11 and then programming the PDP-11).

Whether Noel or I ever do MSCP, the code for all this will be
open-sourced and even in its early stage is already up on GitHub.  It's
just the Verilog, I haven't yet gone through the exercise to figure out
what-all Xilinx/Vivado specific files need to be uploaded so someone
else could reproduce the FPGA load files but once we have prototype QSIC
hardware that's semi-working and anyone else expresses interest in
playing with this stuff, I'll work with them to figure it out.