One of the deeper dives into RISC vs CISC I've seen

[Chuck Guzis]

On 6/12/19 1:47 PM, alan--- via cctalk wrote:
> 
> I especially appreciated he not only offered an opinion - his specific
> ideas on where the boarder between RISC and CISC was - but then provided
> an analysis of a bunch of processors based on those criteria and an
> analysis of the outliers that challenged his criteria.  It's a well
> thought-out and explained opinion that just doesn't happen often on the
> Internet.
> 
> I assume from RS/6000, he meant generally the Power gen 1 architecture. 
> And IBM RT/PC he meant ROMP.  I'm pretty sure Alpha was well established
> when he wrote the analysis.  Would have been nice to see that included. 
> If I had more time, I'd research it.  Maybe SuperH and WE32 as well.
> 

Is the discussion restricted to microprocessors?

--Chuck