Plane of core memory

[Brent Hilpert]

On 2019-Apr-18, at 8:47 AM, Jon Elson wrote:
> On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote:
>> It's a 4-wire 3D planar array. By topology and construction I would guess it date it from the 60s.
> Make that EARLY '60s.  As soon as somebody figured out that you could combine the sense and inhibit wires, everybody immediately went to 3-wire planes.


Well, not everybody - I have a 4-wire, diagonal-sense module with IC date codes extending from 1974 to 1978.
Certainly it's an outlier, on the tail-end of the distribution curve of production of such design,
but that's why I expressed dating it to the 60s as a likelihood, not an absolute surety.

(The ICs are 711 comparators and diode arrays. The 711 does go back to at least 1969 so it's conceivable
 the design of the module goes back to the late 60s, although that's seems less likely considering production into 1978.)