Rayethon Computer AN/FYK9 CMI Store 33

[dwight]

Nicolet 1080 is 20 bit data but has 16 bit address space. No stack functions. It has a register called link but that is only a single bit carry. Subroutines use the first address to store the return, meaning they were not recursive without something to save the returns ( I think dec did this too but I'm not a dec person ).

20 bits was considered enough noise level to do ffts for NMR chemical analysis. The machine typically came with 12Kx20 core but one could add on another 12Kx20 unit, even though the address size could access 64K. There were special DMA operations that only ran on the lower memory.

Dwight


________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Chuck Guzis via cctalk <cctalk at classiccmp.org>
Sent: Tuesday, September 25, 2018 9:21:55 AM
To: Christian Corti via cctalk
Subject: Re: Rayethon Computer AN/FYK9 CMI Store 33

On 09/25/2018 08:45 AM, Christian Corti via cctalk wrote:
> On Mon, 24 Sep 2018, Chuck Guzis wrote:
>> How about some 22-bit or 13 bit architectures?
>
> How about our Dietz MINCAL 523? 19 bit architecture, memory is 20 bits
> with parity. Microprogrammed machine, microcode within normal address
> space, mixed twos-complement and sign-magnitude arithmetic. Completely
> reverse-engineered due to lack of information :-))
> 8K core memory, microcode and boot loader stored in foil ROMs (similar
> to wire rope ROMs).

I was wondering if anyone would rise to the challenge.  In fact, some
Harvard-architecture MCUs have unusual *instruction* word lengths.

I think the PB250 was 22/44 bits and, of course, there was a whole horde
of 36-bit mainframes, some extending well into the 1980s, as well as
other systems with multiples of 6 bit lengths.

How many of today's ISAs are *not* byte-addressable nor implement a
stack?  I'm somewhat curious as to how HLLs have influenced our thought
regarding architecture.

--Chuck