modern stuff

[Eric Smith]

On Thu, Oct 25, 2018 at 12:48 PM Chuck Guzis via cctalk <
cctalk at classiccmp.org> wrote:

> (the 432 is not a single chip
> microcomputer--the basic family, as I recall was no less than three
> (43201, 43202 and 43203) QIP chips.


The General Data Processor (GDP) was split between two chips, the 43201 and
43202. It is the real "processor" of the 432 system.

The Interface Processor (IP), is a single chip, the 43203. It is used with
a conventional microprocessor, typically an 8086, known as the Attached
Processor (AP),

An iAPX 432 system could potentially contain up to 255 processors in total,
with an arbitrary mix of GDPs and IPs. You need at least one GDP. A system
to run the iMAX 432 operating system generally needed two IPs.


>   The cost for the set given to us in
> the range of 4 figures.
>

The chips weren't actually that expensive; they were roughly $150 each for
the 7 MHz speed grade. The board- and system-level products were quite
expensive.

The i860 RISC CPU at one time was even being
>
endorsed by BillG as a possible personal computer basis.  I think that
> the follow-on, the i960 was somewhat successful.
>

Note that the i960 was totally unrelated to the i860. The i960 is actually
a follow-on to the iAPX 432.

The 432 led to the BiiN joint venture with Siemens. The BiiN processor was
a RISC but with 33-bit memory words containing a tag bit to distinguish
data from capabilities, to allow the 432-style object architecture with a
RISC base.

BiiN was unsuccessful, so Intel disabled the tag bit of the processor and
called it the i960. A later version of the i960 had the tag bit enabled.