does a reverse-engineering EDA tool exist?
Guy Sotomayor Jr
ggs at shiresoft.com
Thu Oct 25 11:18:45 CDT 2018
> On Oct 25, 2018, at 9:02 AM, Jon Elson via cctalk <cctalk at classiccmp.org> wrote:
>
> On 10/25/2018 12:44 AM, Chuck Guzis via cctalk wrote:
>> On 10/24/18 8:06 PM, Jon Elson via cctalk wrote:
>>
>>> Hmmm, you COULD actually use a schematic tool to do this! Maybe create
>>> the components to look like DIPs. I know I could do this in Protel 99
>>> without a great deal of trouble. Then, just draw in all the wires.
>>> I suspect a few other good schematic entry tools could also do this.
>> I know that I've asked about this on one of the EDA boards and got
>> nowhere. It seems that it would be possible to construct a schematic
>> from a netlist, but I've never seen such a tool.
>>
>> I wonder if such a beast exists.
>>
>>
> Well, not totally automatic, but many EDA systems have "back annotation", where changes to the PCB are taken back to the schematic. This is generally used to allow easy reassignment of the identical sections in multi-gate packages, but at least some of them can do MUCH more. I know Protel 99 essentially turns the whole board into a spreadsheet, where everything is available for reassignment. I suspect that if you laid out all the chips and then provided the interconnect info, it would create a VERY messy schematic, which you could then reorganize by hand. You could also make a PCB design, draw in the wiring, and it would then be able to make a netlist and take that back to the schematic.
>
I’m wondering if a “bed of nails” could be built that would allow for automated scanning of the traces to at least get the netlist. I do know that PCB fab houses use either a “bed of nails” or a flying probe to validate the construction of the boards. Now that I think about it, a flying probe may be easier for us hobbyists to construct. The trick will be getting sufficient x/y resolution and not having the two probes interfere when the two probes are close to each other.
TTFN - Guy
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