Core memory emulator using non volatile ram.

[Paul Koning]

> On Dec 16, 2018, at 10:49 PM, Rod G8DGR via cctech <cctech at classiccmp.org> wrote:
> 
> 
> I’m trying to make a  look and feel  reproduction PDP-8/e. 
> So the memory characteristics need to be as close as possible.
> 
> An original ( and I do have one)  and the copy when placed side by side should run in sync.
> When executing he same code – What code I couldn’t care.
> 
> Rod

All you need for that to be true is to use the same bus timing as the original.  What happens behind the scenes is unimportant.

At LCM while restoring their CDC 6500 they built replacement memory modules, which actually mimic not just core memory cycle timing but also core memory waveforms -- which took some fiddling with pulse transformers.  But behind the interface logic there's simple modern memory, probably SRAM, I forgot.

	paul