Core memory emulator using non volatile ram.

[allison]

On 12/15/2018 03:51 PM, Jon Elson via cctech wrote:
> On 12/15/2018 02:45 PM, Anders Nelson via cctalk wrote:
>> Serial flash has an endurance between 10K-100K writes per cell so I
>> think
>> that would break down quickly. Wear-leveling on a serial device would be
>> very slow...
>>
>>
> If you intend to use it as main core memory on an old CPU, it will
> perform VERY poorly, as these memories need to erase a page at a time,
> and the erase takes milliseconds.  So, writing ONE SINGLE word at a
> time would invoke an erase cycle each time, slowing it to 1/1000 or
> worse the speed of the original core memory.  Also, most old CPUs have
> the memory timing built into the CPU, and can't handle a memory that
> says "wait".
>
> Jon
The only place where Flash or similar tech fits is applied to the mass
storage problem such as replicating
a RF/DF32 multihead disk.

The cycle life is a limiting factor for things like swapping drums/disks
but for something that's
read mostly its ok.

Core is RAM, and not serial anyway.

Allison