Need help with an odd design construct

Brent Hilpert bhilpert at shaw.ca
Tue Nov 14 18:32:54 CST 2017


On 2017-Nov-14, at 3:20 PM, Jim Brain via cctalk wrote:

> Having picked up one of these little TI Compact Computer-40 (cc40) units over the Summer, I thought I'd work on reverse engineering a RAM cartridge for the unit.
> 
> As shown on this forum:
> 
> http://atariage.com/forums/topic/255728-the-compact-computer-40-cc40/?p=3890516
> 
> The design *appears* to havea  "floating" ground when powered off battery alone.  The cartrridge edge connector has 2 grounds.  I didn't think anything about them at first, assuming they were connected to each other.
> 
> Hwoever, someone with a RAM cart is helping me reverse engineer, and it appears pin 1 ground is connected to the RAM GND pin, but is connected via a 6K8 resistor to the 3V battery ground, which is connected to pin 27 ground line.
> 
> I *assume* this means that, once the cart is pulled, the battery voltage sits somewhere in the middle of the 5V swing the RAM needs to see, but I can;t figure out how one calculates the voltage divider value for the inherent resistance of an SRAM, as the 3V is sent through a germanium diode (bringing the effective Vcc of the SRAM to 2.7V), and then SRAM ground is sent through the 6K8 to battery ground.
> 
> Obviously, reverse engineering being fraught with errors, we could be wrong, but assuming not, what is going on in this circuit, and how does one calculate the effective potential of the GND pin of the SRAM?
> 
> Pics:
> 
> http://www.go4retro.com/downloads/CC40RAM/


Once the cart is pulled the 4008 chip should end up in standby mode - no enables asserted.

In standby a CMOS chip like this will appear as a near infinite impedance, so there isn't much voltage dividing going on with a 6.8K R.
The full battery voltage (minus epsilon) will be across the chip.

The datasheet specs standby current Isb1 at typically 4 uA (50 max).
Ohm's law will get you an idea of the effective resistance of the chip if you really want to calculate what epsilon is here.

CMOS memory doesn't require current to hold it's state, just the voltage potential.
Kind of like a tire holding it's shape just with air pressure (potential differential to the outside air), it doesn't require air flow or power to hold up.
As with the tire however, there is leakage, which is what would constitute Isb1.

From my own measurements with some CMOS chip holding config in some equipment, Vcc can typically drop pretty low in standby and still hold state.

Why the circuit might be as you have it with the 6.8K I'm not sure, perhaps for some current limiting or glitch suppression as the cart is pulled out/in.
Doesn't really matter much as the only other thing on that gnd side is the switches.

Those 4 10K resistors are kind of weird, each 'on' switch is chewing up orders of magnitude more battery current than the chip,
might make more sense if they went to Vcc where they would be diode blocked when the cart is on battery.




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