EWD37

[Cameron Kaiser]

> Oh my!  You couldn't have a subroutine that called another
> subroutine, using their surroutine call/return instructions!  I never
> knew that!

Strictly speaking, that would still be true of any CPU that uses a link
register instead of a stack for return addresses (most RISC CPUs including
PowerPC, ARM and MIPS; TMS 9900; etc). These architectures have to explicitly
save the return address in the LR as part of the callee function prologue
just as these older systems would have had to (or the equivalent operation).

Amusingly, many PowerPC implementations have a stack that backs the link
register for optimizing the return instruction ('blr').

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  Cameron Kaiser * Floodgap Systems * www.floodgap.com * ckaiser at floodgap.com
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